參數(shù)資料
型號： IDT82V2048EBBG
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 37/76頁
文件大?。?/td> 0K
描述： IC LINE INTERFACE UNIT 208-PBGA
標(biāo)準(zhǔn)包裝： 10
類型： 線路接口裝置（LIU）
規(guī)程： E1
電源電壓： 3.13 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 208-BGA
供應(yīng)商設(shè)備封裝： 208-PBGA（17x17）
包裝： 托盤
產(chǎn)品目錄頁面： 1259 (CN2011-ZH PDF)
其它名稱： 800-1704
82V2048EBBG
42
INDUSTRIAL
TEMPERATURE RANGES
OCTAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
Table-30 TCF2: Transmitter Configuration Register 2
(R/W, Address = 04H,24H,44H,64H,84H,A4H,C4H,E4H)
Symbol
Bit
Default
Description
-
7-6
00
Reserved
SCAL[5:0]
5-0
100001
SCAL specifies a scaling factor to be applied to the amplitude of the user-programmable arbitrary pulses which is
to be transmitted if needed. The default value of SCAL[5:0] is ‘100001’. Refer to 3.2.3.2 User-Programmable Arbi-
= 110110: default value for T1 0~133 ft, T1 133~266 ft, T1 266~399 ft, T1 399~533 ft, T1 533~655 ft, J1 0~655 ft.
One step change of this value results in 2% scaling up/down against the pulse amplitude.
= 100001: default value for E1 75
and 120 . One step change of this value results in 3% scaling up/down
against the pulse amplitude.
Table-31 TCF3: Transmitter Configuration Register 3
(R/W, Address = 05H,25H,45H,65H,85H,A5H,C5H,E5H)
Symbol
Bit
Default
Description
DONE
7
0
After ‘1’ is written to this bit, a read or write operation is implemented.
RW
6
0
This bit selects read or write operation
= 0: write to RAM
= 1: read from RAM
UI[1:0]
5-4
00
These bits specify the unit interval address. There are 4 unit intervals.
= 00: UI address is 0 (The most left UI)
= 01: UI address is 1
= 10: UI address is 2
= 11: UI address is 3
SAMP[3:0]
3-0
0000
These bits specify the sample address. Each UI has 16 samples.
= 0000: sample address is 0 (The most left Sample)
= 0001: sample address is 1
= 0010: sample address is 2
......
= 1110: sample address is 14
= 1111: sample address is 15
Table-32 TCF4: Transmitter Configuration Register 4
(R/W, Address = 06H,26H,46H,66H,86H,A6H,C6H,E6H)
Symbol
Bit
Default
Description
-7
0
Reserved
WDAT[6:0]
6-0
0000000
In Indirect Write operation, the WDAT[6:0] will be loaded to the pulse template RAM, specifying the amplitude of
the Sample.
After an Indirect Read operation, the amplitude data of the Sample in the pulse template RAM will be output to the
WDAT[6:0].
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