參數(shù)資料
型號(hào)： IDT82V2048EBBG
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 36/76頁
文件大小： 0K
描述： IC LINE INTERFACE UNIT 208-PBGA
標(biāo)準(zhǔn)包裝： 10
類型： 線路接口裝置（LIU）
規(guī)程： E1
電源電壓： 3.13 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 208-BGA
供應(yīng)商設(shè)備封裝： 208-PBGA（17x17）
包裝： 托盤
產(chǎn)品目錄頁面： 1259 (CN2011-ZH PDF)
其它名稱： 800-1704
82V2048EBBG
41
INDUSTRIAL
TEMPERATURE RANGES
OCTAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
4.2.3
TRANSMIT PATH CONTROL REGISTERS
1. In internal impedance matching mode, for E1/75
cable impedance, the PULS[3:0] bits (TCF1, 03H...) should be set to ‘0000’. In external impedance matching
mode, for E1/75
cable impedance, the PULS[3:0] bits should be set to ‘0001’.
Table-28 TCF0: Transmitter Configuration Register 0
(R/W, Address = 02H,22H,42H,62H,82H,A2H,C2H,E2H)
Symbol
Bit
Default
Description
-
7-5
000
Reserved
T_OFF
4
0
Transmitter power down enable
= 0: Transmitter power up
= 1: Transmitter power down and line driver high impedance
TD_INV
3
0
Transmit data invert
= 0: data on TDn or TDPn/TDNn is active high
= 1: data on TDn or TDPn/TDNn is active low
TCLK_SEL
2
0
Transmit clock edge select
= 0: data on TDn or TDPn/TDNn is sampled on the falling edges of TCLKn
= 1: data on TDn or TDPn/TDNn is sampled on the rising edges of TCLKn
T_MD[1:0]
1-0
00
Transmitter operation mode control bits which select different stages of transmit data path
= 00: enable HDB3/B8ZS encoder and waveform shaper blocks, input on TDn is single rail NRZ data
= 01: enable AMI encoder and waveform shaper blocks, input on pin TDn is single rail NRZ data
= 1x: encoder is bypassed, dual rail NRZ transmit data input on pin TDPn/TDNn
Table-29 TCF1: Transmitter Configuration Register 1
(R/W, Address = 03H,23H,43H,63H,83H,A3H,C3H,E3H)
Symbol
Bit
Default
Description
-
7-6
00
Reserved. This bit should be ‘0’ for normal operation.
DFM_OFF
5
0
Transmit driver failure monitor disable
= 0: DFM is enabled
= 1: DFM is disabled
THZ
4
1
Transmit line driver high impedance enable
= 0: normal state
= 1: transmit line driver high impedance enable (other transmit path still in normal state)
PULS[3:0]
3-0
0000
These bits select the transmit template.
T1/E1/J1
TCLK
Cable Impedance
Cable Range
Cable Loss
00001
E1
2.048 MHz
75
-0~24 dB
0001
E1
2.048 MHz
120
-0~24 dB
0010
DSX1
1.544 MHz
100
0~133 ft
0~0.6 dB
0011
DSX1
1.544 MHz
100
133~266 ft
0.6~1.2 dB
0100
DSX1
1.544 MHz
100
266~399 ft
1.2~1.8 dB
0101
DSX1
1.544 MHz
100
399~533 ft
1.8~2.4 dB
0110
DSX1
1.544 MHz
100
533~655 ft
2.4~3.0 dB
0111
J1
1.544 MHz
110
0~655 ft
0~3.0 dB
1000 - 1011
Reserved
11xx
User programmable waveform setting
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