48
8168C-MCU Wireless-02/10
AT86RF212
5.2.3.1 Configuration Registers
RX_AACK configuration as described below shall be done prior to switching the
AT86RF212 into state RX_AACK_ON, refer to section
5.2.1.Table 5-8 summarizes all register bits which affect the behavior of an RX_AACK
transaction. For frame filtering it is further required to setup address registers to match
to the expected address.
Table 5-8. Overview of RX_AACK Configuration Bits
Register
Address
Register
Bit
Name
Description
0x20,0x21
0x22,0x23
0x24
…
0x2B
SHORT_ADDR_0/1
PAN_ADDR_0/1
IEEE_ADDR_0
…
IEEE_ADDR_7
Setup Frame Filter, see section
6.2.10x0C
7
RX_SAFE_MODE
Dynamic frame buffer protection, see
0x17
1
AACK_PROM_MODE
Enable promiscuous mode
0x17
2
AACK_ACK_TIME
Modify auto acknowledge start time
0x17
4
AACK_UPLD_RES_FT
Enable reserved frame type reception,
needed to receive non-standard compliant
0x17
5
AACK_FLTR_RES_FT
Filter reserved frame types like data frame
type, needed for filtering of non-standard
compliant frames, see section
5.2.3.30x2C
0
SLOTTED_OPERATION
If set, acknowledgment transmission has
to be triggered by pin 11 (SLP_TR), see
0x2E
3
AACK_I_AM_COORD
Define device as PAN coordinator, see
0x2E
4
AACK_DIS_ACK
Disable generation of acknowledgment
0x2E
5
AACK_SET_PD
Signal pending data in Frame Control
Field (FCF) of acknowledgement
0x2E
7:6
AACK_FVN_MODE
Control the ACK generation, depending
on FCF frame version number
The usage of the RX_AACK configuration bits for various device types or operating
modes is explained in the following sections. Configuration bits not mentioned in the
following two sections should be set to their reset values according to
Table 11-2.5.2.3.2 Configuration of IEEE Compliant Scenarios
Device not operating as a PAN Coordinator
Table 5-9 shows the RX_AACK configuration registers, required to setup a typical
IEEE 802.15.4 compliant device.