參數(shù)資料
型號(hào)： IF180C52EXXX-L16:R
廠商： TEMIC SEMICONDUCTORS
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP44
文件頁(yè)數(shù)： 5/101頁(yè)
文件大?。?/td> 3398K
34
8168C-MCU Wireless-02/10
AT86RF212
Note that for CLKM clock rates 250 kHz and symbol clock rates (CLKM_CTRL values 6
and 7; register 0x03, TRX_CTRL_0), the master clock signal CLKM is switched off
immediately after the rising edge of SLP_TR.
The reception of a frame shall be indicated to the microcontroller by an interrupt
indicating the receive status. CLKM is turned on again, and the radio transceiver enters
the BUSY_RX state (see section 4.6 and Figure 4-16). When using RX_ON_NOCLK, it
is essential to enable at least one interrupt request indicating the reception status.
After the receive transaction has been completed, the radio transceiver enters the
RX_ON state. The radio transceiver only reenters the RX_ON_NOCLK state when the
next rising edge of pin SLP_TR pin occurs.
If the AT86RF212 is in the RX_ON_NOCLK state and pin SLP_TR is reset to logic low,
it enters the RX_ON state and it starts to supply clock on the CLKM pin again.
A reset in state RX_ON_NOCLK further requires to reset pin SLP_TR to logic low,
otherwise the radio transceiver enters directly the SLEEP state.
5.1.2.7 BUSY_TX – Transmit State
A transmission can only be initiated in state PLL_ON. There are two ways to start a
transmission:
Rising edge of pin 11 (SLP_TR)
TX_START command written to register bits TRX_CMD (register 0x02,
TRX_STATE).
Either of these forces the radio transceiver into the BUSY_TX state.
During the transition to BUSY_TX state, the PLL frequency shifts to the transmit
frequency, refer to section 7.8.3. The actual transmission of the first data chip of the
SHR starts after 1 symbol period (see note) in order to allow PLL settling and PA ramp-
up, see Figure 5-6. After transmission of the SHR, the Frame Buffer content is
transmitted. In case the PHR indicates a frame length of zero, the transmission is
aborted immediately after the PHR field.
After the frame transmission has been completed, the AT86RF212 automatically turns
off the power amplifier, generates an IRQ_3 (TRX_END) interrupt, and returns into
PLL_ON state.
Note
Throughout this data sheet, a “symbol period” refers to the definition described in
section 7.1.3.
5.1.2.8 RESET State
The RESET state is used to set back the state machine and to reset all registers of the
AT86RF212 to their default values; exceptions are register bits CLKM_CTRL (register
0x03, TRX_CTRL_0). These register bits require a specific treatment, for details see
section 7.7.4.
A reset forces the radio transceiver into TRX_OFF state. If, however, the device is in
P_ON state, it remains in P_ON state.
A reset is initiated with pin /RST = L and the state returns after setting /RST = H. The
reset pulse should have a minimum length as specified in sections 5.1.4.5 and 10.4
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