參數(shù)資料
型號(hào)： INTEL82802AB
廠商： Intel Corp.
英文描述： Firmware Hub (FWH)
中文描述： 固件集線器（固件樞紐）
文件頁(yè)數(shù)： 14/53頁(yè)
文件大?。?/td> 471K
代理商： INTEL82802AB
Intel
82802AB/AC Firmware Hub
R
14
Datasheet
2.1.
Pin Descriptions
The pin descriptions table details the usage of each device pin. Most pins have dual functionality, with
functions in both the Intel Firmware Hub and A/A Mux interfaces. The A/A Mux functionality for pins is
shown
bold italic
in the description box for that pin. All pins are designed to be compliant with
VCC + 0.3 V max. unless otherwise noted.
Table 1.
Pin Descriptions
Interface
Symbol
Type
Intel
FWH
A/A Mux
Name and Function
IC
I
X
X
Interface Configuration Pin.
This pin determines which interface is
used to communicate with the device. When it is held low, the Intel
FWH interface is enabled. When it is held High, the A/A Mux
interface is enabled. This pin must be set at power-up or before
return from reset, and must not be changed during device operation.
This pin is pulled down with an internal resistor of between 20 and
100 k
. When the IC is High (A/A Mux mode), this pin will exhibit a
leakage current of approximately 200
μ
A. This pin may be floated,
which will select the Intel FWH mode.
RST#
I
X
X
Interface Reset.
Valid for both A/A Mux and Intel FWH interface
operation. When driven low, RST# inhibits write operations to
provide data protection during power transitions, resets internal
automation, and tri-states pins FWH[3:0] (in Intel FWH interface
mode). RST#-high enables normal operation. When exiting from
reset, the device defaults to read array mode.
INIT#
I
X
Processor Reset.
This is a second reset pin for in-system use. This
pin is internally combined with the RST# pin. If this pin or RST# is
driven low, identical operation is exhibited. This signal is designed to
be connected to the chipset INIT signal (Max. voltage depends on
the processor. Do
not
use 3.3 V).
A/A Mux = OE#
CLK
I
X
33-MHz Clock for
Intel
FWH Interface.
This input is the same as
that for the PCI clock and adheres to the PCI specification.
A/A Mux = R/C#
FWH[3:0]
I/O
X
Intel FWH I/Os.
I/O communication
A/A Mux = DQ[3:0]
FWH4
I
X
Intel FWH Input.
Input communication
A/A Mux = WE#
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