參數(shù)資料
型號(hào): IS61LV5128
廠商: Integrated Silicon Solution, Inc.
英文描述: 512K x 8 High-Speed CMOS Static RAM(512K x 8 高速CMOS靜態(tài)RAM)
中文描述: 為512k × 8高速CMOS靜態(tài)RAM(為512k × 8高速的CMOS靜態(tài)RAM)的
文件頁(yè)數(shù): 4/8頁(yè)
文件大?。?/td> 68K
代理商: IS61LV5128
4
Integrated Silicon Solution, Inc.
1-800-379-4774
Rev. A
05/02/00
IS61LV5128
ISSI
AC TEST LOADS
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-10 ns
Min.
-12 ns
Min.
-15 ns
Min.
Symbol
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
(2)
t
HZOE
(2)
t
LZCE
(2)
t
HZCE
(2)
t
PU
t
PD
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
Parameter
Max.
Max.
Max.
Unit
Read Cycle Time
10
12
15
ns
Address Access Time
10
12
15
ns
Output Hold Time
3
3
3
ns
CE
Access Time
10
12
15
ns
OE
Access Time
4
5
7
ns
OE
to Low-Z Output
0
0
0
ns
OE
to High-Z Output
0
4
0
5
0
6
ns
CE
to Low-Z Output
3
3
3
ns
CE
to High-Z Output
Power Up Time
Power Down Time
0
0
4
10
0
0
6
12
0
0
8
15
ns
ns
ns
Figure 1
Figure 2
319
30 pF
Including
jig and
scope
353
OUTPUT
3.3V
319
5 pF
Including
jig and
scope
353
OUTPUT
3.3V
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