ISL12020M
2
FN6667.5
December 13, 2011
Block Diagram
Pin Configuration
ISL12020M
(20 LD DFN)
TOP VIEW
I2C
INTERFACE
CONTROL
LOGIC
ALARM
FREQUENCY
OUT
RTC
DIVIDER
SDA
BUFFER
CRYSTAL
OSCILLATOR
POR
SWITCH
SCL
BUFFER
SDA
SCL
X1
X2
VDD
VBAT
INTERNAL
SUPPLY
VTRIP
SECONDS
MINUTES
HOURS
DAY OF WEEK
DATE
MONTH
YEAR
USER
SRAM
CONTROL
REGISTERS
GND
REGISTERS
TEMPERATURE
SENSOR
FREQUENCY
CONTROL
IRQ/FOUT
+
-
Ordering Information
PART NUMBER
PART
MARKING
VDD RANGE
(V)
TEMP RANGE
(°C)
PACKAGE
(RoHS COMPLIANT)
PKG DWG #
ISL 12020MIRZ
2.7 to 5.5
-40 to +85
20 Ld DFN
L20.5.5x4.0
ISL12020MIRZ-EVALZ
Evaluation Board
NOTES:
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL12020M. For more information on MSL please see techbrief
TB363.
X2
X1
NC
VBAT
GND
NC
VDD
IRQ/FOUT
SCL
NC
SDA
19
18
17
20
16
15
14
13
12
11
2
3
4
1
5
6
7
8
9
10
THERMAL
PAD