- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8546 > ISL76161AVZ-T (Intersil)IC CONV D/A 12BIT HS 28-TSSOP PDF資料下載
參數(shù)資料
| 型號： | ISL76161AVZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 12/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONV D/A 12BIT HS 28-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 12 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 120mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 130M |
9
FN6720.2
December 23, 2013
Definition of Specifications
Adjacent Channel Power Ratio, ACPR, is the ratio of the
average power in the adjacent frequency channel (or offset)
to the average power in the transmitted frequency channel.
Differential Linearity Error, DNL, is the measure of the
step size output deviation from code to code. Ideally, the
step size should be 1 LSB. A DNL specification of 1 LSB or
less guarantees monotonicity.
EDGE, Enhanced Data for Global Evolution, a TDMA
standard for cellular applications which uses 200kHz BW,
8-PSK modulated carriers.
Full Scale Gain Drift, is measured by setting the data inputs
to be all logic high (all 1s) and measuring the output voltage
through a known resistance as the temperature is varied
from TMIN to TMAX. It is defined as the maximum deviation
from the value measured at room temperature to the value
measured at either TMIN or TMAX. The units are ppm of FSR
(full scale range) per °C.
Full Scale Gain Error, is the error from an ideal ratio of 32
between the output current and the full scale adjust current
(through RSET).
GSM, Global System for Mobile Communication, a TDMA
standard for cellular applications which uses 200kHz BW,
GMSK modulated carriers.
Integral Linearity Error, INL, is the measure of the worst
case point that deviates from a best fit straight line of data
values along the transfer curve.
Internal Reference Voltage Drift, is defined as the
maximum deviation from the value measured at room
temperature to the value measured at either TMIN or TMAX.
The units are ppm per °C.
Offset Drift, is measured by setting the data inputs to all
logic low (all 0s) and measuring the output voltage at IOUTA
through a known resistance as the temperature is varied
from TMIN to TMAX. It is defined as the maximum deviation
from the value measured at room temperature to the value
measured at either TMIN or TMAX. The units are ppm of FSR
(full scale range) per °C.
Offset Error, is measured by setting the data inputs to all
logic low (all 0s) and measuring the output voltage of IOUTA
through a known resistance. Offset error is defined as the
maximum deviation of the IOUTA output current from a value
of 0mA.
Output Voltage Compliance Range, is the voltage limit
imposed on the output. The output impedance should be
chosen such that the voltage developed does not violate the
compliance range.
Power Supply Rejection, is measured using a single power
supply. The nominal supply voltage is varied ±10% and the
change in the DAC full scale output is noted.
Reference Input Multiplying Bandwidth, is defined as the
3dB bandwidth of the voltage reference input. It is measured
by using a sinusoidal waveform as the external reference
with the digital inputs set to all 1s. The frequency is
increased until the amplitude of the output waveform is
0.707 (-3dB) of its original value.
Spurious Free Dynamic Range, SFDR, is the amplitude
difference from the fundamental signal to the largest
harmonically or non-harmonically related spur within the
specified frequency window.
Total Harmonic Distortion, THD, is the ratio of the RMS
value of the fundamental output signal to the RMS sum of
the first five harmonic components.
UMTS, Universal Mobile Telecommunications System, a
W-CDMA standard for cellular applications which uses
3.84MHz modulated carriers.
Detailed Description
The ISL76161 is a 12-bit, current out, CMOS, digital to
analog converter. The maximum update rate is at least
130MSPS and can be powered by a single power supply in
the recommended range of +3.0V to +3.6V. Operation with
clock rates higher than 130MSPS is possible; please contact
the factory for more information. It consumes less than
120mW of power when using a +3.3V supply, the maximum
20mA of output current, and the data switching at 130MSPS.
The architecture is based on a segmented current source
arrangement that reduces glitch by reducing the amount of
current switching at any one time. In previous architectures
that contained all binary weighted current sources or a
binary weighted resistor ladder, the converter may have had
a substantially larger amount of current turning on and off at
certain, worst-case transition points, such as midscale and
quarter scale transitions. By greatly reducing the amount of
current switching at these major transitions, the overall glitch
of the converter is dramatically reduced, improving settling
time, transient problems, and accuracy.
Digital Inputs and Termination
The ISL76161 digital inputs are guaranteed to 3V LVCMOS
levels. The internal register is updated on the rising edge of
the clock. To minimize reflections, proper transmission line
termination should be implemented. If the lines driving the
clock and the digital inputs are long 50
Ω lines, then proper
transmission line termination techniques should be used.
Termination is not likely needed as long as the digital
waveform source is within a few inches of the DAC. For
digital drivers with very high speed edge rates, it is
recommended that the user consider series resistors (50
Ω to
200
Ω) immediately prior to the DAC’s inputs in order to
reduce the amount of noise.
Power Supply
Separate digital and analog power supplies are recommended.
The allowable supply range is +2.7V to +3.6V. The
ISL76161
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LT1191CN8#PBF | IC OP-AMP VIDEO HI-SPD SNGL 8DIP |
| LT1191CN8 | IC OP-AMP VIDEO HI-SPD SNGL 8DIP |
| HI5760BIBZ-T | CONV D/A 10BIT 125MSPS 28-SOIC |
| LT6207CGN#TRPBF | IC OP AMP VIDEO QUAD 3V 16-SSOP |
| LT6207CGN#TR | IC OPAMP VID QUAD 100MHZ 16-SSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL76161AVZ-TK | 功能描述:IC CONV D/A 12BIT HS 28-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| ISL76321 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:16-Bit Long-Reach Video Automotive Grade SERDES with Bi-directional Side-Channel |
| ISL76321ARZ | 功能描述:串行器/解串器 - Serdes ISL76321 48L 7X7(PUN CHED AUTO RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| ISL76321ARZ-T13 | 功能描述:串行器/解串器 - Serdes ISL76321 48L 7X7(PUN CHED AUTO RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| ISL76321ARZ-TK | 功能描述:串行器/解串器 - Serdes ISL76321 48L 7X7(PUN CHED 1K AUTO RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。