AC CHARACTERISTICS (Using Figure 12 with RDIFF = 100Ω, R
參數(shù)資料
型號： ISL76161AVZ-T
廠商： Intersil
文件頁數(shù)： 8/12頁
文件大?。?/td> 0K
描述： IC CONV D/A 12BIT HS 28-TSSOP
標準包裝： 2,500
位數(shù)： 12
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 120mW
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 28-TSSOP
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電流，單極
采樣率（每秒）： 130M
5
FN6720.2
December 23, 2013
AC CHARACTERISTICS (Using Figure 12 with RDIFF = 100Ω, RLOAD = RA = RB = 50Ω, Full Scale Output = -2.0dBm)
Spurious Free Dynamic Range,
SFDR Within a Window
fCLK = 130MSPS, fOUT = 20.2MHz, 20MHz Span (Notes 6, 8)
-
85
-
dBc
Spurious Free Dynamic Range,
SFDR to Nyquist (fCLK/2)
fCLK = 130MSPS, fOUT = 50.5MHz (Notes 6, 8)
-
57
-
dBc
fCLK = 130MSPS, fOUT = 40.4MHz (Notes 6, 8)
-
62
-
dBc
fCLK = 130MSPS, fOUT = 20.2MHz (Notes 6, 9)
-
69
-
dBc
fCLK = 130MSPS, fOUT = 10.1MHz (Notes 6, 8)
-
73
-
dBc
fCLK = 130MSPS, fOUT = 5.05MHz, T = +25°C (Notes 6, 8)
70
77
-
dBc
fCLK = 130MSPS, fOUT = 5.05MHz, T = -40°C to +105°C (Notes 6, 8)
67
-
dBc
fCLK = 100MSPS, fOUT = 40.4MHz (Notes 6, 8)
-
60
-
dBc
fCLK = 80MSPS, fOUT = 30.3MHz (Notes 6, 8)
-
63
-
dBc
fCLK = 80MSPS, fOUT = 20.2MHz (Notes 6, 8)
-
69
-
dBc
fCLK = 80MSPS, fOUT = 10.1MHz (Notes 6, 8, 10)
-
70
-
dBc
fCLK = 80MSPS, fOUT = 5.05MHz (Notes 6, 8)
-
76
-
dBc
fCLK = 50MSPS, fOUT = 20.2MHz (Notes 6, 8)
-
68
-
dBc
fCLK = 50MSPS, fOUT = 10.1MHz (Notes 6, 8)
-
73
-
dBc
fCLK = 50MSPS, fOUT = 5.05MHz (Notes 6, 8)
-
77
-
dBc
Spurious Free Dynamic Range,
SFDR in a Window with Eight Tones
fCLK = 130MSPS, fOUT = 17.5MHz to 27.9MHz, 1.3MHz Spacing,
35MHz Span (Notes 6, 8)
-68
-
dBc
fCLK = 80MSPS, fOUT = 10.8MHz to 17.2MHz, 811kHz Spacing,
15MHz Span (Notes 6, 8)
-75
-
dBc
fCLK = 50MSPS, fOUT = 6.7MHz to 10.8MHz, 490kHz Spacing,
10MHz Span (Notes 6, 8)
-77
-
dBc
Spurious Free Dynamic Range,
SFDR in a Window with EDGE or GSM
fCLK = 78MSPS, fOUT = 11MHz, in a 20MHz Window, RBW = 30kHz
(Notes 6, 8, 10)
-90
-
dBc
Adjacent Channel Power Ratio,
ACPR with UMTS
fCLK = 76.8MSPS, fOUT = 19.2MHz, RBW = 30kHz (Notes 6, 8, 10)
-
70
-
dB
VOLTAGE REFERENCE
Internal Reference Voltage, VFSADJ
Pin 18 Voltage with Internal Reference
1.2
1.23
1.3
V
Internal Reference Voltage Drift
-
±40
-
ppm/°C
Internal Reference Output Current
Sink/Source Capability
Reference is not intended to be externally loaded
-
0
-
A
Reference Input Impedance
-1
-
M
Ω
Reference Input Multiplying Bandwidth (Note 8)
-
1.0
-
MHz
DIGITAL INPUTS
D11-D0, CLK
Input Logic High Voltage with
3.3V Supply, VIH
(Note 5)
0.7 *
DVDD
--
V
Input Logic Low Voltage with
3.3V Supply, VIL
(Note 5)
-
0.3 *
DVDD
V
Sleep Input Current, IIH
-25
-
+25
A
Input Logic Current, IIH, IL
-20
-
+20
A
Clock Input Current, IIH, IL
-10
-
+10
A
Electrical Specifications
AVDD = DVDD = +3.3V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = +25°C for All Typical Values; Parameters
with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested. (Continued)
PARAMETER
TEST CONDITIONS
TA = -40°C TO +105°C
UNITS
MIN
TYP
MAX
ISL76161
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