Digital Input Capacitance, CIN -5 - pF TIMING CHARACTERISTICS
參數(shù)資料
型號: ISL76161AVZ-T
廠商: Intersil
文件頁數(shù): 9/12頁
文件大?。?/td> 0K
描述: IC CONV D/A 12BIT HS 28-TSSOP
標準包裝: 2,500
位數(shù): 12
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
功率耗散(最大): 120mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 130M
6
FN6720.2
December 23, 2013
Digital Input Capacitance, CIN
-5
-
pF
TIMING CHARACTERISTICS
Data Setup Time, tSU
See Figure 13
-
1.5
-
ns
Data Hold Time, tHLD
See Figure 13
-
1.5
-
ns
Propagation Delay Time, tPD
See Figure 13
-
1
-
Clock
Period
Minimum CLK Pulse Width, tPW1,
tPW2
See Figure 13, (Note 11)
-
2
-
ns
POWER SUPPLY CHARACTERISTICS (Note 5)
AVDD Power Supply
(Note 9)
2.7
3.3
3.6
V
DVDD Power Supply
(Note 9)
2.7
3.3
3.6
V
Analog Supply Current (IAVDD)
3.3V, IOUTFS = 20mA
-
27.5
28.5
mA
3.3V, IOUTFS = 2mA
-
10
-
mA
Digital Supply Current (IDVDD)
3.3V (Note 7)
-
3.7
5
mA
Supply Current (IAVDD) Sleep Mode
3.3V, IOUTFS = Don’t Care
-
1.5
-
mA
Power Dissipation
3.3V, IOUTFS = 20mA (Note 7)
-
103
111
mW
3.3V, IOUTFS = 20mA
-
110
120
mW
3.3V, IOUTFS = 2mA (Note 7)
-
45
-
mW
Power Supply Rejection
Single Supply (Note 8)
-0.125
-
+0.125
%FSR/V
NOTES:
4. Gain Error measured as the error in the ratio between the full scale output current and the current through RSET (typically 625A). Ideally, the
ratio should be 32.
5. Power supply current measurements are performed with all digital inputs at either DVDD or DCOM
6. Spectral measurements made with differential transformer coupled output and no external filtering. For multitone testing, the same pattern was
used at different clock rates, producing different output frequencies but at the same ratio to the clock rate.
7. Measured with the clock at 130MSPS and the output frequency at 5MHz.
9. Recommended operation is from 3.0V to 3.6V. Operation below 3.0V is possible with some degradation in spectral performance. Reduction in
analog output current may be necessary to maintain spectral performance.
10. See “Typical Performance” plots on page 7.
11. Tested in production with a clock pulse width of 50% duty cycle.
Electrical Specifications
AVDD = DVDD = +3.3V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = +25°C for All Typical Values; Parameters
with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested. (Continued)
PARAMETER
TEST CONDITIONS
TA = -40°C TO +105°C
UNITS
MIN
TYP
MAX
ISL76161
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