參數資料
型號: ISP1561BM
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: ISP1561BM
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-128
文件頁數: 15/102頁
文件大?。?/td> 2875K
代理商: ISP1561BM
Philips Semiconductors
ISP1561
USB PCI host controller
Product data
Rev. 01 — 06 February 2003
15 of 102
9397 750 10015
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
8.1.2
PCI Initiator/Target
A PCI initiator initiates PCI transactions to the PCI bus; a PCI target responds to PCI
transactions as a slave. In the case of the ISP1561, the two Open Host Controllers
and the Enhanced Host Controller function as both initiators or the targets of PCI
transactions issued by the host CPU.
All USB Host Controllers have their own operational registers, which can be accessed
by the system driver software. Drivers use these registers to configure the Host
Controller hardware system, issue commands to it and/or monitor the status of the
current hardware operation. The Host Controller plays the role of a PCI target. All
operational registers of the Host Controllers are PCI transaction targets of the CPU.
Normal USB transfers require the Host Controller to access system memory fields,
which are allocated by USB Host Controller Drivers (HCDs) and PCI drivers. The
Host Controller hardware interacts with the HCD by accessing these buffers. The
Host Controller works as an initiator in this case, and becomes a PCI master.
8.2 PCI configuration registers
The OHCI USB Host Controllers and EHCI USB Host Controller contain two sets of
software-accessible hardware registers
:
PCI configuration registers and
memory-mapped Host Controller registers.
A set of the configuration registers are implemented for each of the three PCI
functions of the ISP1561, see
Table 3
.
Remark:
In addition to the normal PCI header (from offset index 00H to 3FH),
implementation-specific registers are defined to support power management and
function-specific features.
Table 3:
Address
(Hex)
PCI configuration space registers of OHCI1, OHCI2 and EHCI
[1]
Bits 31 to 22
Bits 23 to 16
Bits 15 to 8
Bits 7 to 0
Reset Hex Value
Func0 OHCI1 Func1 OHCI2 Func2 EHCI
1561 1131
1561 1131
0210
0000
0210
0000
0C0310 30
0C0310 30
00 80
00 00
00 80
00 00
00
04
08
0C
DID[15:0]
Status[15:0]
Class Code[23:0]
BIST[7:0]
VID[15:0]
Command[15:0]
1562 1131
0210
0000
0C0320 30
00 80
00 00
REVID[7:0]
CLS[7:0]
Header
Type[7:0]
LT[7:0]
10
14
18
1C
20
24
28
2C
30
34
38
BAR 0[31:0]
00000
000
00000
000
000000
00
Base Address Register 1, 2, 3, 4, 5
(Not configurable to prevent setting by the driver)
00000000
00000000
00000000
Cardbus CIS Pointer[31:0]
SID[15:0]
Expansion ROM Base Address[31:0]
Reserved
Reserved
00000000
1561 1131
00000000
000000 DC
00000000
00000000
1561 1131
00000000
000000 DC
00000000
00000000
1562 1131
00000000
000000 DC
00000000
SVID[15:0]
CP[7:0]
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ISP1561BM,551 功能描述:USB 接口集成電路 USB 2.0 HOST CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1561BM,557 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
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