參數(shù)資料
型號： ISP1760BE
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Hi-Speed Universal Serial Bus host controller for embedded applications
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝： 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-425-1, LQFP-128
文件頁數(shù)： 34/105頁
文件大?。?/td> 449K
代理商： ISP1760BE
9397 750 13257
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 8 November 2004
34 of 105
Philips Semiconductors
ISP1760
Embedded Hi-Speed USB host controller
[1]
The reserved bits should always be written with the reset value.
[1]
For details on register bit description, refer to Enhanced Host Controller Interface Specification for Universal
Serial Bus Rev. 1.0
8.2.5
CTRLDSSEGMENT register (R/W: 0030h)
The Control Data Structure Segment (CTRLDSSEGMENT) register corresponds to the
most significant address bits (63 to 32) for all EHCI data structures. If the 64AC (64-bit
Addressing Capability) field in HCCPARAMS is cleared, then this register is not used and
software cannot write to it (reading from this register returns zero).
If the 64AC (64-bit Addressing Capability) field in HCCPARAMS is set, this register is used
with link pointers to construct 64-bit addresses to EHCI control data structures. This
register is concatenated with the link pointer from either the PERIODICLISTBASE,
ASYNCLISTADDR, or any control data structure link field to construct a 64-bit address.
This register allows the host software to locate all control data structures within the same
4 gigabytes memory segment.
8.2.6
CONFIGFLAG register (R/W: 0060h)
The bit allocation of the Configure Flag (CONFIGFLAG) register is given in
Table 20
.
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
23
22
21
20
19
18
17
16
reserved
[1]
0
0
0
0
0
0
0
0
R/W
15
R/W
14
R/W
13
R/W
12
R/W
11
FRINDEX[13:8]
0
R/W
3
R/W
10
R/W
9
R/W
8
reserved
[1]
0
0
0
0
0
0
0
R/W
7
R/W
6
R/W
5
R/W
4
FRINDEX[7:0]
0
R/W
R/W
2
R/W
1
R/W
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 19:
Bit
31 to 14 -
13 to 0
FRINDEX register: bit description
Symbol
Description
[1]
reserved
FRINDEX[13:0]
Frame Index
: Bits in this register are used for the frame number in the
SOF packet and as the index into the Frame List. The value in this
register increments at the end of each time frame (for example,
microframe).
Table 20:
Bit
Symbol
Reset
Access
CONFIGFLAG register: bit allocation
31
30
29
28
27
26
25
24
reserved
[1]
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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ISP1760BE,518 功能描述:輸入/輸出控制器接口集成電路 USB HOST CONTROLLER RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
ISP1760BE,551 功能描述:輸入/輸出控制器接口集成電路 USB HS HOST CONTRLLR RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
ISP1760BE,557 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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