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參數(shù)資料
| 型號： | K9K1G08U0A1 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128M x 8 Bit / 64M x 16 Bit NAND Flash Memory |
| 中文描述： | 128M的× 8位/ 64米× 16位NAND閃存 |
| 文件頁數(shù)： | 13/43頁 |
| 文件大?。?/td> | 906K |
| 代理商： | K9K1G08U0A1 |
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FLASH MEMORY
13
K9K1G08U0A
Valid Block
K9K1G08Q0A
K9K1G16U0A
K9K1G16Q0A
Preliminary
NOTE
:
1. The
device
may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid blocks is pre-
sented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits
. Do not try to access
these invalid blocks for program and erase.
Refer to the attached technical notes for an appropriate management of invalid blocks.
2. The 1st block, which is placed on 00h block address, is fully guaranteed to be a valid block, does not require Error Correction.
3.
Minimum 1004 valid blocks are guaranteed for each contiguous 128Mb memory space.
AC TEST CONDITION
(K9K1GXXX0A-XCB0 :TA=0 to 70
°
C, K9K1GXXX0A-XIB0 :TA=-40 to 85
°
C
K9K1GXXQ0A : Vcc=1.70V~1.95V , K9K1GXXU0A : Vcc=2.7V~3.6V unless otherwise noted)
Parameter
Symbol
Min
Typ.
Max
Unit
Valid Block Number
N
VB
8,042
-
8,192
Blocks
Program / Erase Characteristics
Parameter
Symbol
Min
Typ
Max
Unit
Program Time
t
PROG
-
200
500
μ
s
μ
s
Dummy Busy Time for Multi Plane Program
t
DBSY
1
10
Number of Partial Program Cycles
in the Same Page
Main Array
Nop
-
-
1
cycle
Spare Array
-
-
2
cycles
Block Erase Time
t
BERS
-
2
3
ms
Capacitance
(
T
A
=25
°
C, V
CC
=1.8V/3.3V, f=1.0MHz)
NOTE
: Capacitance is periodically sampled and not 100% tested.
MODE SELECTION
Item
Symbol
Test Condition
Min
Max
Unit
Input/Output Capacitance
C
I/O
V
IL
=0V
-
20
pF
Input Capacitance
C
IN
V
IN
=0V
-
20
pF
Parameter
K9K1GXXQ0A
K9K1GXXU0A
Input Pulse Levels
0V to Vcc
Q
0.4V to 2.4V
Input Rise and Fall Times
5ns
5ns
Input and Output Timing Levels
Vcc
Q
/2
1.5V
K9K1GXXQ0A:Output Load (Vcc
Q
:1.8V +/-10%)
K9K1GXXU0A:Output Load (Vcc
Q
:3.0V +/-10%)
1 TTL GATE and CL=30pF
1 TTL GATE and CL=50pF
K9K1GXXU0A:Output Load (Vcc
Q
:3.3V +/-10%)
-
1 TTL GATE and CL=100pF
NOTE
: 1. X can be V
IL
or V
IH.
2. WP should be biased to CMOS high or CMOS low for standby.
CLE
ALE
CE
WE
RE
GND
WP
Mode
H
L
L
H
X
X
Read Mode
Command Input
L
H
L
H
X
X
Address Input(4clock)
H
L
L
H
X
H
Write Mode
Command Input
L
H
L
H
X
H
Address Input(4clock)
L
L
L
H
L
H
Data Input
L
L
L
H
L
X
Data Output
L
L
L
H
H
L
X
During Read(Busy) on K9K1G08U0A_Y,P or K9K1G08U0A_V,F
X
X
X
X
H
L
X
During Read(Busy) on the devices except K9K1G08U0A_Y,P and
K9K1G08U0A_V,F
X
X
X
X
X
L
H
During Program(Busy)
X
X
X
X
X
X
H
During Erase(Busy)
X
X
(1)
X
X
X
X
L
Write Protect
X
X
H
X
X
0V
0V/
Stand-by
相關PDF資料 |
PDF描述 |
|---|---|
| K9K1G16Q0A | 128M x 8 Bit / 64M x 16 Bit NAND Flash Memory |
| K9K1G16U0A | 128M x 8 Bit / 64M x 16 Bit NAND Flash Memory |
| K9K2G08U1A | 128M x 8 Bit / 256M x 8 Bit NAND Flash Memory |
| K9F1G08R0A | Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVP00; No. of Contacts:99; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Body Style:Straight |
| K9K2G16Q0M-YIB0 | 256M x 8 Bit / 128M x 16 Bit NAND Flash Memory |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| K9K1G08U0B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128M x 8 Bit NAND Flash Memory |
| K9K1G08U0B-JIB0000 | 制造商:Samsung Semiconductor 功能描述:1GB SLC DIE STACK X8 FBGA - Trays |
| K9K1G08U0M | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:nand flash |
| K9K1G08U0M-YCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:nand flash |
| K9K1G08U0M-YIB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:nand flash |
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