TIMING DIAGRAMS TIMING DIAGRAMS Figur" />
參數(shù)資料
型號: KIT33742DWEVB
廠商: Freescale Semiconductor
文件頁數(shù): 13/71頁
文件大?。?/td> 0K
描述: KIT FOR 33742 SBC WITH EHSCAN
標準包裝: 1
主要目的: 接口,CAN 控制器
已用 IC / 零件: MC33742
相關產(chǎn)品: MC33742DW-ND - IC SYSTEM BASE W/LIN 28-SOIC
MC33742DWR2-ND - IC SYSTEM BASE W/LIN 28-SOIC
MC33742SDW-ND - IC SYSTEM BASE W/LIN 28-SOIC
MC33742SDWR2-ND - IC SYSTEM BASE W/LIN 28-SOIC
Analog Integrated Circuit Device Data
20
Freescale Semiconductor
33742
ELECTRICAL CHARACTERISTICS
TIMING DIAGRAMS
TIMING DIAGRAMS
Figure 7. SPI Timing Diagram
Figure 8. Propagation Loop Delay TXD to RXD
Figure 9. Propagation Delay TXD to CAN
DI 0
DO 0
Undefined
Don’t Care
DI 8
Don’t Care
tLEAD
tSISU
tWSCLKH
DO 8
CS
SCLK
MOSI
MISO
Note Incoming data at MOSI pin is sampled by the 33742 at SCLK falling edge. Outgoing data at MISO pin
is set by the 33742 at SCLK rising edge (after tVALID delay time).
tSIH
tWSCLKL
tLAG
tVALID
tSOEN
tSODIS
tPCLK
TXD
0.8 V
tLRD
0.8 V
RXD
tLDR
2.0 V
TXD
0.8 V
tTRD
0.9 V
VDIFF
2.0 V
0.5 V
tTDR
VDIFF = VCANH - VCANL
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