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參數(shù)資料
| 型號(hào)： | KIT33742DWEVB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 22/71頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT FOR 33742 SBC WITH EHSCAN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，CAN 控制器 |
| 已用 IC / 零件： | MC33742 |
| 相關(guān)產(chǎn)品： | MC33742DW-ND - IC SYSTEM BASE W/LIN 28-SOIC MC33742DWR2-ND - IC SYSTEM BASE W/LIN 28-SOIC MC33742SDW-ND - IC SYSTEM BASE W/LIN 28-SOIC MC33742SDWR2-ND - IC SYSTEM BASE W/LIN 28-SOIC |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
29
33742
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
APPLICATION WAKE-UP FROM THE MCU
When the device is in the Stop mode, a wake-up event may come from the system MCU. In this case the MCU selects the
device the using a LOW-to-HIGH transition on the 33742 CS pin. Then the 33742S goes into Normal Request mode and
generates an interrupt pulse at the INT pin.
STOP MODE CURRENT MONITOR
If the VDD output current exceeds an internal set threshold (IDDS-WU), the SBC automatically enters the Normal Request mode
and generates an interrupt at the INT pin. The interrupt is a non-maskable and the INTR register will have no flag set.
INTERRUPT GENERATION WHEN WAKE-UP FROM STOP MODE
When the SBC wakes from Stop mode, it first enters the Normal Request mode before generating a 10
s typical pulse on the
INT pin. These are non-maskable interrupts with the wake-up event read through the SPI registers, the CANWU bit in the CAN
Register (CANR), or the LCTRx bit in the Wake-up Register (WUR). In case of wake-up from Stop mode over-current situation
or from forced wake-up, no bits are set. After the INT pulse, the 33742 accepts SPI command after a time delay (tS-1STSPI).
WATCHDOG SOFTWARE IN STOP MODE
If the SBC watchdog is enabled, the application must provide a “system ok” response before the end of the 33742 watchdog
time. Typically an MCU initiates the wake-up of the 33742 through the SPI wake-up (CS activation). The SBC will awaken and
jump into the Normal Request mode. The MCU has to configure the 33742 to go to either Normal or Standby mode. The MCU
can then decide to return to the Stop mode.
If no MCU wake-up occurs within the watchdog time period, the SBC activates the RST pin and jumps into the Normal Request
mode. The MCU can then be re-initialized.
STOP MODE ENTER COMMAND
Stop mode is entered at the end of the SPI message at the rising edge of the CS. (Refer to the t CS-STOP data in the Dynamic
Electrical Characteristics table on page 16.) Once Stop mode is entered, the SBC can wake up from a VDD regulator over-current
detection state. In order to allow time for the MCU to complete the last CPU instruction and enter its low power mode, a deglitcher
time of 40
s typical is implemented.
Figure 11. Entering the Stop Mode
WATCHDOG SOFTWARE (RST AND WDOG)(SELECTABLE WATCHDOG WINDOW
OR WATCHDOG TIME-OUT)
A watchdog is used in the SBC Normal and Standby modes for monitoring the MCU operation. The watchdog timer may be
implemented as either a watchdog window or watchdog timeout, selectable by SPI (TIM1 sub register, bit WDW). Default
operation is a watchdog window.
The watchdog period can be set from 10 to 350 ms (TIM1 sub register, bits WDT0 and WDT1). When a watchdog window is
selected, the closed window is the first part of the selected period, and the open window is the second part of the period. (Refer
to Timing Register (TIM1/2) beginning on page 52.)
The watchdog can only be cleared within the open window time period. Any attempt to clear watchdog in the closed window
will generate a reset. The watchdog is cleared addressing the TIM1 sub register using the SPI
SPI CS
SPI Stop/Sleep
Command
33742 in Normal
or Standby mode
33742 in Stop mode.
No IDD over IDD-DGLT
33742 in Stop mode.
IDD over IDD-DGLT
tCS-STOP
tIDD-DGLT
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