LOGIC COMMANDS AND REGISTERS HIGH-SPEED CAN" />
參數(shù)資料
型號: KIT33742DWEVB
廠商: Freescale Semiconductor
文件頁數(shù): 46/71頁
文件大小: 0K
描述: KIT FOR 33742 SBC WITH EHSCAN
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,CAN 控制器
已用 IC / 零件: MC33742
相關(guān)產(chǎn)品: MC33742DW-ND - IC SYSTEM BASE W/LIN 28-SOIC
MC33742DWR2-ND - IC SYSTEM BASE W/LIN 28-SOIC
MC33742SDW-ND - IC SYSTEM BASE W/LIN 28-SOIC
MC33742SDWR2-ND - IC SYSTEM BASE W/LIN 28-SOIC
Analog Integrated Circuit Device Data
50
Freescale Semiconductor
33742
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
HIGH-SPEED CAN TRANSCEIVER MODES
The MODE bit (D0) controls the state of the CAN interface, TXRX or Sleep mode (Table 23). SC0 bit (D1) defines the slew
rate when the CAN module is in TXRX, and it controls the wake-up option (wake-up enable or disable) when the CAN module is
in Sleep mode.
INPUT/OUTPUT REGISTER (IOR)
Tables 25 through 27 contain the Input/Output Register information. Table 26 provides information about information HS
control in Normal and Standby modes, while Table 27 provides status bit information.
Table 23. CAN High Speed Transceiver Modes
SC1
SC0
MODE
CAN Mode
(Pass 1.1)
0
CAN TXRX, Slew Rate 0
0
1
0
CAN TXRX, Slew Rate 1
1
0
CAN TXRX, Slew Rate 2
1
0
CAN TXRX, Slew Rate 3
x
1
CAN Sleep and CAN Wake-up Disable
x
0
1
CAN Sleep and CAN Wake-up Enable
x = Don’t care.
Table 24. CAN Register Status Bits
Name
Logic
Description
CANWU
0
No CAN wake-up occurred.
1
CAN wake-up occurred.
CAN-F
0
No CAN failure.
1
CAN failure(58).
CAN-UF
0
Identified CAN failure(58).
1
Non-identified CAN failure.
THERM-CUR
0
No over-temperature or over-current on CANH or CANL drivers.
1
Over-temperature or over-current on CANH or CANL drivers.
Notes
58.
Error bits are latched in the CAN register.
Table 25. Input/Output Register
IOR
R/W
D3
D2
D1
D0
$011b
W
HSON
R
V2LOW
HSOT
VSUPLOW
DEBUG
Reset Value
0
Reset Condition (Write)(59)
POR
Notes
59.
See Table 13, page 46, for definitions of reset conditions.
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