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參數(shù)資料
| 型號(hào)： | KMM5324000BSW |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4M x 32 DRAM SIMM(4M x 32 動(dòng)態(tài) RAM模塊) |
| 中文描述： | 4米× 32的DRAM上海藥物研究所（4米× 32動(dòng)態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 5/18頁 |
| 文件大小： | 334K |
| 代理商： | KMM5324000BSW |
DRAM MODULE
KMM5324000BSW/BSWG
NOTES
An initial pause of 200us is required after power-up followed
by any 8 RAS-only or CAS-before-RAS refresh cycles before
proper device operation is achieved.
Input voltage levels are V
ih
/V
il
. V
IH
(min) and V
IL
(max) are ref-
erence levels for measuring timing of input signals. Transition
times are measured between V
IH
(min) and V
IL
(max) and are
assumed to be 5ns for all inputs.
Measured with a load equivalent to 2 TTL loads and 100pF.
Operation within the
t
RCD
(max) limit insures that
t
RAC
(max)
can be met.
t
RCD
(max) is specified as a reference point only.
If
t
RCD
is greater than the specified
t
RCD
(max) limit, then
access time is controlled exclusively by
t
CAC
.
Assumes that
t
RCD
≥
t
RCD
(max).
This parameter defines the time at which the output achieves
the open circuit condition and is not referenced to V
OH
or
V
OL
.
t
WCS
is non-restrictive operating parameter. It is included in
the data sheet as electrical characteristics only. If
t
WCS
≥
t
WCS
(min), the cycle is an early write cycle and the
data out pin will remain high impedance for the duration of
the cycle.
Either
t
RCH
or
t
RRH
must be satisfied for a read cycle.
These parameters are referenced to the CAS leading edge in
early write cycles.
Operation within the
t
RAD
(max) limit insures that
t
RAC
(max)
can be met.
t
RAD
(max) is specified as reference point only. If
t
RAD
is greater than the specified
t
RAD
(max) limit, then
access time is controlled by
t
AA
.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Test condition : V
ih
/V
il
=2.6/0.8V, V
oh
/V
ol
=2.4/0.4V, output loading CL=100pF
Parameter
Symbol
-5
-6
Unit
Note
Min
35
10
50
10
10
Max
Min
40
10
60
10
10
Max
Fast page mode cycle time
CAS precharge time(Fast page cycle)
RAS pulse width(Fast page cycle)
W to RAS precharge time(C-B-R refresh)
W to RAS hold time(C-B-R refresh)
t
PC
t
CP
t
RASP
t
WRP
t
WRH
ns
ns
ns
ns
ns
200K
200K
AC CHARACTERISTICS
(0
°
C
≤
T
A
≤
70
°
C, V
CC
=5.0V
±
10%. See notes 1,2.)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KMM5324000BSWG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 32 DRAM SIMM Using 4Mx16, 4K Refresh, 5V |
| KMM5324000CK | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 32 DRAM SIMM using 4Mx4, 4K/2K Refresh, 5V |
| KMM5324000CKG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 32 DRAM SIMM using 4Mx4, 4K/2K Refresh, 5V |
| KMM5324004BSW | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 32 DRAM SIMM Using 4Mx16, 4K Refresh, 5V |
| KMM5324004BSWG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 32 DRAM SIMM Using 4Mx16, 4K Refresh, 5V |
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