參數(shù)資料
型號: KSZ8842-PMBL
廠商: Micrel Inc
文件頁數(shù): 48/119頁
文件大?。?/td> 0K
描述: IC ETHERNT SW 2PORT PCI 100LFBGA
特色產(chǎn)品: Micrel Drives Ethernet Into the Global Automotive World
標(biāo)準(zhǔn)包裝: 260
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: PCI
電源電壓: 3.1 V ~ 3.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LFBGA
供應(yīng)商設(shè)備封裝: 100-LFBGA
包裝: 托盤
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
配用: 576-1636-ND - BOARD EVALUATION KSZ8842-PMQL
其它名稱: 576-3089
Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
34
M9999-100207-1.5
Bit [8] of registers P1CR4 and P2CR4 is used to enable far-end loop back for ports 1 and 2, respectively. Alternatively,
Bit [14] of registers P1MBCR and P2MBCR can also be used to enable far-end loop back. When register P2MBCR bit
14 =1 or P2CR4 bit 8 =1, the port 2 far-end loop back path is illustrated in the Figure 11.
Near-end (Remote) Loop back:
Near-end (Remote) loop back is conducted at either PHY port 1 or PHY port 2 of the KSZ8842-PMQL/PMBL. The loop
back path starts at the PHY port’s receive inputs (RXPx/RXMx), wraps around at the same PHY port’s PMD/PMA, and
ends at the PHY port’s transmit outputs (TXPx/TXMx).
Bit [1] of registers P1PHYCTRL and P2PHYCTRL is used to enable near-end loop back for ports 1 and 2, respectively.
Alternatively, Bit [9] of registers P1SCSLMD and P2SCSLMD can also be used to enable near-end loop back. Both
ports 1 and 2 near-end loop back paths are illustrated in the following Figure 10.
PM D 2 / P M A 2
PC S2
MA C 2
Sw i t c h
MA C 1
PC S1
PM D 1 / P M A 1
O r ig in a t i n g
PH Y
P o r t 1
PH Y
Po r t 2
F a r- en d
L o o p b a ck
RX P 1
/
RX M 1
TX P 1
/
TX M 1
Figure 10. Port 2 Far-End Loop back Path
PM D 2 / P M A 2
PC S2
MA C 2
Sw i t c h
MA C 1
PC S1
PM D 1 / P M A 1
RX P
RX P 1
11
1 ////
RX M
RX M 1
11
1
TX P
TX P 1
11
1 ////
TX M
TX M 1
11
1
TX P
TX P 2
22
2 ////
TX M
TX M 2
22
2
RX P
RX P 2
22
2 ////
RX M
RX M 2
22
2
PH Y Po r t
PH Y Po r t 2
22
2
N ear
N ear ---- end
end
end (((( r em ot e
re m o t e
re m o t e ))))
Loopbac k
PH Y Po r t
PH Y Po r t 1
11
1
Ne a r
Ne a r ----e n d
en d
en d (((( r em ot e
re m o t e
re m o t e ))))
Loop bac k
Figure 11. Port 1 and Port 2 Near-End (Remote) Loop back Path
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