參數(shù)資料
型號: KSZ8862-16MQL
廠商: Micrel Inc
文件頁數(shù): 91/125頁
文件大小: 0K
描述: IC SWITCH 10/100 16BIT 128-PQFP
標(biāo)準(zhǔn)包裝: 66
系列: KSZ8862
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: PCI
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤
配用: 576-1638-ND - BOARD EVALUATION KSZ8862-10FL
576-1637-ND - BOARD EVALUATION KSZ8862-100FX
其它名稱: 576-1564
Micrel, Inc.
KSZ8862-16/32MQL
April 2007
68
M9999-040407-3.0
Bank 19 Multicast Table Register 0 (0x00): MTR0
The 64-bit multicast table is used for group address filtering. This value is defined as the six most significant bits from
CRC circuit calculation result that is based on 48-bit of DA input. The two most significant bits select one of the four
registers to be used, while the others determine which bit within the register.
Multicast table register 0.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
MTR0 Multicast Table 0
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
Bank 19 Multicast Table Register 1 (0x02): MTR1
Multicast table register 1.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
MTR0 Multicast Table 1
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
Bank 19 Multicast Table Register 2 (0x04): MTR2
Multicast table register 2.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
MTR0 Multicast Table 2
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
Bank 19 Multicast Table Register 3 (0x06): MTR3
Multicast table register 3.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
MTR0 Multicast Table 3
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
Banks 20 – 31: Reserved
Except Bank Select Register (0xE).
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