參數(shù)資料
型號(hào): KSZ8863MLLI
廠商: Micrel Inc
文件頁(yè)數(shù): 12/106頁(yè)
文件大小: 0K
描述: IC ETHERNET SWITCH 3PORT 48-LQFP
標(biāo)準(zhǔn)包裝: 250
控制器類(lèi)型: 以太網(wǎng)開(kāi)關(guān)控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤(pán)
配用: 576-3867-ND - BOARD EVALUATION FOR KSZ8863MLL
其它名稱(chēng): 576-3751
PIC16C72 Series
DS39016A-page 12
Preliminary
1998 Microchip Technology Inc.
2.2.2.4
PIE1 REGISTER
This register contains the individual enable bits for the
peripheral interrupts.
FIGURE 2-6:
PIE1 REGISTER (ADDRESS 8Ch)
Note:
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
U-0
R/W-0
U-0
R/W-0
ADIE
SSPIE
CCP1IE
TMR2IE
TMR1IE
R
= Readable bit
W = Writable bit
U
= Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit7
bit0
bit 7:
Unimplemented: Read as '0'
bit 6:
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D interrupt
0 = Disables the A/D interrupt
bit 5-4: Unimplemented: Read as '0'
bit 3:
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
bit 2:
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
bit 1:
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
bit 0:
TMR1IE: TMR1 Overow Interrupt Enable bit
1 = Enables the TMR1 overow interrupt
0 = Disables the TMR1 overow interrupt
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