參數(shù)資料
型號(hào)： KSZ8863MLLI
廠商： Micrel Inc
文件頁(yè)數(shù)： 53/106頁(yè)
文件大?。?/td> 0K
描述： IC ETHERNET SWITCH 3PORT 48-LQFP
標(biāo)準(zhǔn)包裝： 250
控制器類(lèi)型： 以太網(wǎng)開(kāi)關(guān)控制器
接口： MII
電源電壓： 1.8V，2.5V，3.3V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 托盤(pán)
配用： 576-3867-ND - BOARD EVALUATION FOR KSZ8863MLL
其它名稱： 576-3751
Micrel, Inc.
KSZ8863MLL/FLL//RLL
January 27, 2014
5
Revision 1.5
Advanced Switch Functions .............................................................................................................................................. 34
Bypass Mode .................................................................................................................................................................... 34
IEEE 802.1Q VLAN Support............................................................................................................................................. 34
QoS Priority Support ......................................................................................................................................................... 34
Port-Based Priority..................................................................................................................................................... 35
802.1p-Based Priority ................................................................................................................................................ 35
DiffServ-Based Priority .............................................................................................................................................. 35
Spanning Tree Support..................................................................................................................................................... 36
Rapid Spanning Tree Support .......................................................................................................................................... 37
Tail Tagging Mode ............................................................................................................................................................ 37
IGMP Support ................................................................................................................................................................... 38
IGMP Snooping ......................................................................................................................................................... 38
IGMP Send Back to the Subscribed Port .................................................................................................................. 38
Port Mirroring Support ...................................................................................................................................................... 38
Rate Limiting Support ....................................................................................................................................................... 39
Unicast MAC Address Filtering......................................................................................................................................... 39
Configuration Interface ..................................................................................................................................................... 39
I
2C Master Serial Bus Configuration .......................................................................................................................... 39
I2C Slave Serial Bus Configuration ........................................................................................................................... 40
SPI Slave Serial Bus Configuration ........................................................................................................................... 41
Loopback Support............................................................................................................................................................. 43
Far-end Loopback...................................................................................................................................................... 43
Near-end (Remote) Loopback ................................................................................................................................... 44
MII Management (MIIM) Registers ..................................................................................................................................... 45
PHY1 Register 0 (PHYAD = 0x1, REGAD = 0x0): MII Basic Control........................................................................ 46
PHY2 Register 0 (PHYAD = 0x2, REGAD = 0x0): MII Basic Control........................................................................ 46
PHY1 Register 1 (PHYAD = 0x1, REGAD = 0x1): MII Basic Status ......................................................................... 47
PHY2 Register 1 (PHYAD = 0x2, REGAD = 0x1): MII Basic Status ......................................................................... 47
PHY1 Register 2 (PHYAD = 0x1, REGAD = 0x2): PHYID High................................................................................ 47
PHY2 Register 2 (PHYAD = 0x2, REGAD = 0x2): PHYID High................................................................................ 47
PHY1 Register 3 (PHYAD = 0x1, REGAD = 0x3): PHYID Low................................................................................. 47
PHY2 Register 3 (PHYAD = 0x2, REGAD = 0x3): PHYID Low................................................................................. 47
PHY1 Register 4 (PHYAD = 0x1, REGAD = 0x4): Auto-Negotiation Advertisement Ability ..................................... 48
PHY2 Register 4 (PHYAD = 0x2, REGAD = 0x4): Auto-Negotiation Advertisement Ability ..................................... 48
PHY1 Register 5 (PHYAD = 0x1, REGAD = 0x5): Auto-Negotiation Link Partner Ability ......................................... 48
PHY2 Register 5 (PHYAD = 0x2, REGAD = 0x5): Auto-Negotiation Link Partner Ability ......................................... 48
PHY1 Register 29 (PHYAD = 0x1, REGAD = 0x1D): Not support ............................................................................ 49
PHY2 Register 29 (PHYAD = 0x2, REGAD = 0x1D): LinkMD Control/Status .......................................................... 49
PHY1 Register 31 (PHYAD = 0x1, REGAD = 0x1F): PHY Special Control/Status................................................... 49
PHY2 Register 31 (PHYAD = 0x2, REGAD = 0x1F): PHY Special Control/Status................................................... 49
Memory Map (8-bit Registers)............................................................................................................................................ 50
Global Registers ............................................................................................................................................................... 50
Port Registers ................................................................................................................................................................... 50
Advanced Control Registers ............................................................................................................................................. 50
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