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| 型號： | KSZ8863MLLI |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 57/106頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ETHERNET SWITCH 3PORT 48-LQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 控制器類型： | 以太網(wǎng)開關(guān)控制器 |
| 接口： | MII |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤 |
| 配用： | 576-3867-ND - BOARD EVALUATION FOR KSZ8863MLL |
| 其它名稱： | 576-3751 |
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PIC16C72 Series
1998 Microchip Technology Inc.
Preliminary
DS39016A-page 53
9.0
ANALOG-TO-DIGITAL
CONVERTER (A/D) MODULE
The analog-to-digital (A/D) converter module has ve
inputs for the PIC16C72/R72.
The A/D allows conversion of an analog input signal to
a corresponding 8-bit digital number (refer to Applica-
tion Note AN546 for use of A/D Converter). The output
of the sample and hold is the input into the converter,
which generates the result via successive approxima-
tion. The analog reference voltage is software select-
able to either the device’s positive supply voltage (VDD)
or the voltage level on the RA3/AN3/VREF pin.
The A/D converter has a unique feature of being able
to operate while the device is in SLEEP mode. To oper-
ate in sleep, the A/D conversion clock must be derived
from the A/D’s internal RC oscillator.
Additional information on the A/D module is available in
the PICmicro Mid-Range MCU Reference Manual,
DS33023.
The A/D module has three registers. These registers
are:
A/D Result Register (ADRES)
A/D Control Register 0 (ADCON0)
A/D Control Register 1 (ADCON1)
A device reset forces all registers to their reset state.
This forces the A/D module to be turned off, and any
conversion is aborted.
The ADCON0 register, shown in Figure 9-1, controls
the operation of the A/D module. The ADCON1 regis-
ter, shown in Figure 9-2, congures the functions of the
port pins. The port pins can be congured as analog
inputs (RA3 can also be a voltage reference) or as dig-
ital I/O.
FIGURE 9-1:
ADCON0 REGISTER (ADDRESS 1Fh)
R/W-0
U-0
R/W-0
ADCS1 ADCS0
CHS2
CHS1
CHS0
GO/DONE
—
ADON
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit7
bit0
bit 7-6:
ADCS1:ADCS0: A/D Conversion Clock Select bits
00
= FOSC/2
01
= FOSC/8
10
= FOSC/32
11
= FRC (clock derived from an internal RC oscillator)
bit 5-3: CHS2:CHS0: Analog Channel Select bits
000
= channel 0, (RA0/AN0)
001
= channel 1, (RA1/AN1)
010
= channel 2, (RA2/AN2)
011
= channel 3, (RA3/AN3)
100
= channel 4, (RA5/AN4)
bit 2:
GO/DONE: A/D Conversion Status bit
If ADON = 1
1 = A/D conversion in progress (setting this bit starts the A/D conversion)
0 = A/D conversion not in progress (This bit is automatically cleared by hardware when the A/D conver-
sion is complete)
bit 1:
Unimplemented: Read as '0'
bit 0:
ADON: A/D On bit
1 = A/D converter module is operating
0 = A/D converter module is shutoff and consumes no operating current
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