參數(shù)資料
型號： KSZ8863MLLI
廠商： Micrel Inc
文件頁數(shù)： 79/106頁
文件大小： 0K
描述： IC ETHERNET SWITCH 3PORT 48-LQFP
標(biāo)準(zhǔn)包裝： 250
控制器類型： 以太網(wǎng)開關(guān)控制器
接口： MII
電源電壓： 1.8V，2.5V，3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 托盤
配用： 576-3867-ND - BOARD EVALUATION FOR KSZ8863MLL
其它名稱： 576-3751
PIC16C72 Series
1998 Microchip Technology Inc.
Preliminary
DS39016A-page 73
11.0
INSTRUCTION SET SUMMARY
Each PIC16CXXX family instruction is a 14-bit word
divided into an OPCODE which species the instruc-
tion type and one or more operands which further spec-
ify the operation of the instruction. The PIC16CXXX
family instruction set summary in Table 11-2 lists byte-
oriented, bit-oriented, and literal and control opera-
tions. Table 11-1 shows the opcode eld descriptions.
For byte-oriented instructions, 'f' represents a le reg-
ister designator and 'd' represents a destination desig-
nator. The le register designator species which le
register is to be used by the instruction.
The destination designator species where the result of
the operation is to be placed. If 'd' is zero, the result is
placed in the W register. If 'd' is one, the result is placed
in the le register specied in the instruction.
For bit-oriented instructions, 'b' represents a bit eld
designator which selects the number of the bit affected
by the operation, while 'f' represents the number of the
le in which the bit is located.
For literal and control operations, 'k' represents an
eight or eleven bit constant or literal value.
TABLE 11-1
OPCODE FIELD
DESCRIPTIONS
The instruction set is highly orthogonal and is grouped
into three basic categories:
Byte-oriented operations
Bit-oriented operations
Literal and control operations
All instructions are executed within one single instruc-
tion cycle, unless a conditional test is true or the pro-
gram counter is changed as a result of an instruction.
In this case, the execution takes two instruction cycles
with the second cycle executed as a NOP. One instruc-
tion cycle consists of four oscillator periods. Thus, for
an oscillator frequency of 4 MHz, the normal instruction
execution time is 1
s. If a conditional test is true or the
program counter is changed as a result of an instruc-
tion, the instruction execution time is 2
s.
Table 11-2 lists the instructions recognized by the
MPASM assembler.
Figure 11-1 shows the general formats that the instruc-
tions can have.
All examples use the following format to represent a
hexadecimal number:
0xhh
where h signies a hexadecimal digit.
FIGURE 11-1: GENERAL FORMAT FOR
INSTRUCTIONS
A description of each instruction is available in the PIC-
micro Mid-Range MCU Family Reference Manual,
DS33023.
Field
Description
f
Register le address (0x00 to 0x7F)
W
Working register (accumulator)
b
Bit address within an 8-bit le register
k
Literal eld, constant data or label
x
Don't care location (= 0 or 1)
The assembler will generate code with x = 0. It is the
recommended form of use for compatibility with all
Microchip software tools.
d
Destination select; d = 0: store result in W,
d = 1: store result in le register f.
Default is d = 1
PC
Program Counter
TO
Time-out bit
PD
Power-down bit
Note:
To maintain upward compatibility with
future PIC16CXXX products, do not use
the OPTION and TRIS instructions.
Byte-oriented le register operations
13
8
7
6
0
d = 0 for destination W
OPCODE
d
f (FILE #)
d = 1 for destination f
f = 7-bit le register address
Bit-oriented le register operations
13
10 9
7 6
0
OPCODE
b (BIT #)
f (FILE #)
b = 3-bit bit address
f = 7-bit le register address
Literal and control operations
13
8
7
0
OPCODE
k (literal)
k = 8-bit immediate value
13
11
10
0
OPCODE
k (literal)
k = 11-bit immediate value
General
CALL
and GOTO instructions only
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