參數(shù)資料
型號： KSZ8995M
廠商： Micrel Inc
文件頁數(shù)： 42/73頁
文件大小： 0K
描述： IC SWITCH 10/100 5PORT 128PQFP
標(biāo)準(zhǔn)包裝： 66
系列： *
類型： *
應(yīng)用： *
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 托盤
產(chǎn)品目錄頁面： 1081 (CN2011-ZH PDF)
配用： 576-1607-ND - BOARD EVAL EXPERIMENT KSZ8995MA
其它名稱： 576-1038
December 2003
47
M9999-120403
KS8995M
Micrel
Register 24 (0x18): Port 1 Control 8
Register 40 (0x28): Port 2 Control 8
Register 56 (0x38): Port 3 Control 8
Register 72 (0x48): Port 4 Control 8
Register 88 (0x58): Port 5 Control 8
Address
Name
Description
Mode
Default
7-0
Receive high priority
This along with port control 10, bits [3:0] form a 12-bit
R/W
0
rate control [7:0]
field to determine how many “32Kbps” high priority
blocks can be received. (In a unit of 4K bytes in a one
second period.)
Register 25 (0x19): Port 1 Control 9
Register 41 (0x29): Port 2 Control 9
Register 57 (0x39): Port 3 Control 9
Register 73 (0x49): Port 4 Control 9
Register 89 (0x59): Port 5 Control 9
Address
Name
Description
Mode
Default
7-0
Receive low priority
This along with port control 10, bits [7:4] form a 12-bit
R/W
0
rate control [7:0]
field to determine how many “32Kbps” low priority
blocks can be received. (In a unit of 4K bytes in a one
second period.)
Register 26 (0x1A): Port 1 Control 10
Register 42 (0x2A): Port 2 Control 10
Register 58 (0x3A): Port 3 Control 10
Register 74 (0x4A): Port 4 Control 10
Register 90 (0x5A): Port 5 Control 10
Address
Name
Description
Mode
Default
7-4
Receive low priority
This along with port control 9, bits [7:0] form a 12-bit
R/W
0
rate control [11:8]
field to determine how many “32Kbps” low priority
blocks can be received. (In a unit of 4K bytes in a one
second period.)
3-0
Receive high priority
This along with port control 8, bits [7:0] form a 12-bit
R/W
0
rate control [11:8]
field to determine how many “32Kbps” high priority
blocks can be received. (In a unit of 4K bytes in a one
second period.)
Register 27 (0x1B): Port 1 Control 11
Register 43 (0x2B): Port 2 Control 11
Register 59 (0x3B): Port 3 Control 11
Register 75 (0x4B): Port 4 Control 11
Register 91 (0x5B): Port 5 Control 11
Address
Name
Description
Mode
Default
7
Receive differential
1, If bit 6 is also ‘1’ this will enable receive rate control
R/W
0
priority rate control
for this port on low priority packets at the low priority
rate. If bit 5 is also ‘1’, this will enable receive rate
control on high priority packets at the high priority rate
0, receive rate control will be based on the low priority
rate for all packets on this port.
6
Low priority receive
1, enable port’s low priority receive rate control feature.
R/W
0
rate control enable
0, disable port’s low priority receive rate control.
5
High priority receive
1, If bit 7 is also ‘1’ this will enable the port’s high
R/W
0
rate control enable
priority receive rate control feature. If bit 7 is a ‘0’ and
bit 6 is a ‘1’, all receive packets on this port will be rate
controlled at the low priority rate.
0, disable port’s high priority receive rate control feature.
4
Low priority receive rate
1, flow control may be asserted if the port’s low priority
R/W
0
flow control enable
receive rate is exceeded.
0, flow control is not asserted if the port’s low priority
receive rate is exceeded.
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