參數(shù)資料
型號: LAMXO640E-3FTN256E
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 30/77頁
文件大小: 0K
描述: IC FPGA 640LUTS 256TQFP
標準包裝: 90
系列: LA-MachXO
可編程類型: 系統(tǒng)內可編程
最大延遲時間 tpd(1): 4.9ns
電壓電源 - 內部: 1.14 V ~ 1.26 V
宏單元數(shù): 320
輸入/輸出數(shù): 159
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 256-LBGA
供應商設備封裝: 256-FTBGA(17x17)
包裝: 托盤
3-10
DC and Switching Characteristics
Lattice Semiconductor
LA-MachXO Automotive Family Data Sheet
Table 3-2. BLVDS DC Conditions
1
Over Recommended Operating Conditions
LVPECL
The LA-MachXO automotive family supports the differential LVPECL standard through emulation. This output stan-
dard is emulated using complementary LVCMOS outputs in conjunction with a parallel resistor across the driver
outputs on all the devices. The LVPECL input standard is supported by the LVDS differential input buffer on certain
devices. The scheme shown in Figure 3-3 is one possible solution for point-to-point signals.
Figure 3-3. Differential LVPECL
Table 3-3. LVPECL DC Conditions
1
Over Recommended Operating Conditions
Nominal
Symbol
Description
Zo = 45
Zo = 90
Units
ZOUT
Output impedance
100
ohm
RTLEFT
Left end termination
45
90
ohm
RTRIGHT
Right end termination
45
90
ohm
VOH
Output high voltage
1.375
1.48
V
VOL
Output low voltage
1.125
1.02
V
VOD
Output differential voltage
0.25
0.46
V
VCM
Output common mode voltage
1.25
V
IDC
DC output current
11.2
10.2
mA
1. For input buffer, see LVDS table.
Symbol
Description
Nominal
Units
ZOUT
Output impedance
100
ohm
RP
Driver parallel resistor
150
ohm
RT
Receiver termination
100
ohm
VOH
Output high voltage
2.03
V
VOL
Output low voltage
1.27
V
VOD
Output differential voltage
0.76
V
VCM
Output common mode voltage
1.65
V
ZBACK
Back impedance
85.7
ohm
IDC
DC output current
12.7
mA
1. For input buffer, see LVDS table.
Transmission line, Zo = 100 ohm differential
100 ohms
16mA
100 ohms
Off-chip
On-chip
VCCIO = 3.3V
+
-
150 ohms
On-chip
Off-chip
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