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參數(shù)資料
| 型號(hào)： | LPC2939FBD208 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | ARM9 microcontroller with CAN, LIN, and USB |
| 中文描述： | 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP208 |
| 封裝： | 28 X 28 MM, 1.40 MM HEIGHT, PLASTIC, SOT-459, MS-026, LQFP-208 |
| 文件頁數(shù)： | 59/99頁 |
| 文件大?。?/td> | 1945K |
| 代理商： | LPC2939FBD208 |
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LPC2939_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 7 April 2010
59 of 99
NXP Semiconductors
LPC2939
ARM9 microcontroller with CAN, LIN, and USB
Table 31.
Symbol
RST
6.16.5
Power Management Unit (PMU)
This module enables software to actively control the system’s power consumption by
disabling clocks not required in a particular operating mode.
Using the base clocks from the CGU as input, the PMU generates branch clocks to the
rest of the LPC2939. Output clocks branched from the same base clock are phase- and
frequency-related. These branch clocks can be individually controlled by software
programming.
The key features are:
Individual clock control for all LPC2939 sub-modules
Activates sleeping clocks when a wake-up event is detected
Clocks can be individually disabled by software
Supports AHB master-disable protocol when AUTO mode is set
Disables wake-up of enabled clocks when Power-down mode is set
Activates wake-up of enabled clocks when a wake-up event is received
Status register is available to indicate if an input base clock can be safely switched off
(i.e. all branch clocks are disabled)
6.16.5.1
Functional description
The PMU controls all internal clocks coming out of the CGU0 for power-mode
management. With some exceptions, each branch clock can be switched on or off
individually under control of software register bits located in its individual configuration
register. Some branch clocks controlling vital parts of the device operate in a fixed mode.
Table 32
shows which mode control bits are supported by each branch clock.
By programming the configuration register the user can control which clocks are switched
on or off, and which clocks are switched off when entering Power-down mode.
Note that the standby-wait-for-interrupt instructions of the ARM968E-S processor (putting
the ARM CPU into a low-power state) are not supported. Instead putting the ARM CPU
into power-down should be controlled by disabling the branch clock for the CPU.
Remark:
For any disabled branch clocks to be re-activated their corresponding base
clocks must be running (controlled by the CGU0).
Table 32
shows the relation between branch and base clocks, see also
Section 6.7.1
.
Every branch clock is related to one particular base clock: it is not possible to switch the
source of a branch clock in the PMU.
RGU pins
Direction
IN
Description
external reset input, active LOW; pulled up internally
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