參數(shù)資料
型號(hào): M12S128168A-10TG
廠商: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類: DRAM
英文描述: 2M x 16 Bit x 4 Banks Synchronous DRAM
中文描述: 8M X 16 SYNCHRONOUS DRAM, 7 ns, PDSO54
封裝: 0.400 INCH, LEAD FREE, TSOP2-54
文件頁數(shù): 33/44頁
文件大?。?/td> 967K
代理商: M12S128168A-10TG
ES MT
M12S128168A
Elite Semiconductor Memory Technology Inc.
Revision
:
1.0
Publication Date
:
Nov. 2006
33/44
Page Read Cycle at Different Bank @ Burst Length = 4
Note: 1. CS can be don’t cared when RAS , CAS and
WE
are high at the clock high going edge.
2. To interrupt a burst read by row precharge, both the read and the precharge banks must be the same.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M12S128168A-6BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M12S128168A-6TG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M12S128168A-7BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M12S128168A-7TG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M12S128324A 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Synchronous DRAM