參數(shù)資料
型號(hào): M12S16161A-7TG
廠商: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類: DRAM
英文描述: 512K x 16Bit x 2Banks Synchronous DRAM
中文描述: 1M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO50
封裝: 0.400 X 0.825 INCH, 0.80 MM PITCH, LEAD FREE, TSOP2-50
文件頁(yè)數(shù): 12/29頁(yè)
文件大?。?/td> 628K
代理商: M12S16161A-7TG
ES MT
M12S16161A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
May. 2007
Revision
:
1.1
12/29
*Note:
1. All inputs expect CKE & DQM can be don’t care when CS is high at the CLK high going edge.
2. Bank active & read/write are controlled by BA.
BA
Active & Read/Write
0
Bank A
1
Bank B
3.Enable and disable auto precharge function are controlled by A10/AP in read/write command.
A10/AP
BA
Operation
0
Disable auto precharge, leave bank A active at end of burst.
0
1
Disable auto precharge, leave bank B active at end of burst.
0
Enable auto precharge, precharge bank A at end of burst.
1
1
Enable auto precharge, precharge bank B at end of burst.
4.A10/AP and BA control bank precharge when precharge command is asserted.
A10/AP
BA
precharge
0
0
Bank A
0
1
Bank B
1
X
Both Banks
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