參數(shù)資料
型號: M12S16161A-7TG
廠商: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC
元件分類: DRAM
英文描述: 512K x 16Bit x 2Banks Synchronous DRAM
中文描述: 1M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO50
封裝: 0.400 X 0.825 INCH, 0.80 MM PITCH, LEAD FREE, TSOP2-50
文件頁數(shù): 18/29頁
文件大?。?/td> 628K
代理商: M12S16161A-7TG
ES MT
Read & Write Cycle at Different Bank @ Burst Length = 4
M12S16161A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
May. 2007
Revision
:
1.1
18/29
*Note: 1.t
CDL
should be met to complete write.
CLOCK
CKE
CS
RAS
CAS
BA
ADDR
A10/AP
WE
DQM
HIGH
Row Active
(A-Bank)
Row Active
(B-Bank)
Write
(A-Bank)
Precharge
(Both Banks)
: Don't care
DQ
Write
(A-Bank)
Write
(B-Bank)
Write
(B-Bank)
DAa0
DAa1 DAa2
DAa3
DBb0
DBb1
DBb2 DBb3
DAc0
DAc1
DBd0
DBd1
RAa
RBb
RAa
CAa
RBb
CBb
CAc
CBd
*Note2
t
CDL
t
RDL
*Note1
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
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