參數(shù)資料
型號(hào)： M25PE40
廠商： 意法半導(dǎo)體
元件分類： DRAM
英文描述： 4 Mbit Uniform Sector, Serial Flash Memory
中文描述： 4兆位統(tǒng)一部門，串行閃存
文件頁(yè)數(shù)： 10/60頁(yè)
文件大?。?/td> 315K
代理商： M25PE40
SPI modes
M25PE40
10/60
3
SPI modes
These devices can be driven by a microcontroller with its SPI peripheral running in either of
the two following modes:
CPOL=0, CPHA=0
CPOL=1, CPHA=1
●
●
For these two modes, input data is latched in on the rising edge of Serial Clock (C), and
output data is available from the falling edge of Serial Clock (C).
The difference between the two modes, as shown in
Figure 5
, is the clock polarity when the
bus master is in Stand-by mode and not transferring data:
C remains at 0 for (CPOL=0, CPHA=0)
C remains at 1 for (CPOL=1, CPHA=1)
●
●
Figure 4.
Bus master and memory devices on the SPI bus
1.
Figure 4
shows an example of three devices connected to an MCU, on an SPI bus. Only one
device is selected at a time, so only one device drives the Serial Data Output (Q) line at a
time, the other devices are high impedance. Resistors R (represented in
Figure 4
) ensure
that the is not selected if the Bus Master leaves the S line in the high impedance state. As
the Bus Master may enter a state where all inputs/outputs are in high impedance at the
same time (for example, when the Bus Master is reset), the clock line (C) must be connected
to an external pull-down resistor so that, when all inputs/outputs become high impedance,
the S line is pulled High while the C line is pulled Low (thus ensuring that S and C do not
become High at the same time, and so, that the t
SHCH
requirement is met). The typical value
of R is 100 k
, assuming that the time constant R*C
p
(C
p
= parasitic capacitance of the bus
line) is shorter than the time during which the Bus Master leaves the SPI bus in high
impedance.
The Write Protect or Top Sector Lock (W or TSL) signal should be driven, High or Low as appropriate.
AI13558
SPI Bus Master
SPI Memory
Device
SDO
SDI
SCK
C
Q
D
S
SPI Memory
Device
C
Q
D
S
SPI Memory
Device
C
Q
D
S
CS3
CS2 CS1
SPI Interface with
(CPOL, CPHA) =
(0, 0) or (1, 1)
W
or
TSL
HOLD
W
or
TSL
HOLD
W
or
TSL
HOLD
R
R
R
V
CC
V
CC
V
CC
V
CC
V
SS
V
SS
V
SS
V
SS
R
相關(guān)PDF資料
PDF描述
M25PE40VMN6G 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMN6P 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMN6TG 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMN6TP 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMP6G 1A Standard Fixed Output LDO Regulators with Shutdown Switch; Package: TO220FP-5; Constitution materials list: Packing style: Tube packaging; Package quantity: 50; Minimum package quantity: 500;
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M25PE40S-VMW6G 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Trays 制造商:Micron Technology Inc 功能描述:IC FLASH 4MBIT 75MHZ 8SO
M25PE40S-VMW6TG 制造商:Micron Technology Inc 功能描述: 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Tape and Reel
M25PE40S-VMW6TG TR 制造商:Micron Technology Inc 功能描述:IC FLASH 4MBIT 75MHZ 8SO
M25PE40-VMC6G 功能描述:IC SRL FLSH 4MB 75MHZ 8MLP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:Forté™ 標(biāo)準(zhǔn)包裝:2,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 異步 存儲(chǔ)容量:256K (32K x 8) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:28-TSSOP（0.465"，11.8mm 寬） 供應(yīng)商設(shè)備封裝:28-TSOP 包裝:帶卷 (TR) 其它名稱:71V256SA15PZGI8
M25PE40-VMC6TG 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Tape and Reel
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