參數(shù)資料
型號(hào)： M25PE40
廠商： 意法半導(dǎo)體
元件分類： DRAM
英文描述： 4 Mbit Uniform Sector, Serial Flash Memory
中文描述： 4兆位統(tǒng)一部門(mén)，串行閃存
文件頁(yè)數(shù)： 24/60頁(yè)
文件大?。?/td> 315K
代理商： M25PE40
Instructions
M25PE40
24/60
6.4
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction allows the Status Register to be read. The
Status Register may be read at any time, even while a Program, Erase or Write cycle is in
progress. When one of these cycles is in progress, it is recommended to check the Write In
Progress (WIP) bit before sending a new instruction to the device. It is also possible to read
the Status Register continuously, as shown in
Figure 10
.
The status bits of the Status Register are as follows:
6.4.1
WIP bit
The Write In Progress (WIP) bit indicates whether the memory is busy with a Write, Program
or Erase cycle. When set to 1, such a cycle is in progress, when reset to 0 no such cycle is
in progress.
6.4.2
WEL bit
The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch.
When set to 1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable
Latch is reset and no Write, Program or Erase instruction is accepted.
6.4.3
BP2, BP1, BP0 bits
The Block Protect (BP2, BP1, BP0) bits are non-volatile. They define the size of the area to
be software protected against Program and Erase instructions. These bits are written with
the Write Status Register (WRSR) instruction. When one or more of the Block Protect (BP2,
BP1, BP0) bits is set to 1, the relevant memory area (as defined in
Table 3
) becomes
protected against Page Program (PP), Page Erase (PE), Sector Erase (SE) and SubSector
Erase (SSE) instructions. The Block Protect (BP2, BP1, BP0) bits can be written provided
that the Hardware Protected mode has not been set. The Bulk Erase (BE) instruction is
executed if, and only if:
all Block Protect (BP2, BP1, BP0) bits are 0
the Lock Register protection bits are not all set (‘1’)
●
●
6.4.4
SRWD bit
The Status Register Write Disable (SRWD) bit is operated in conjunction with the Write
Protect (W) signal. When the Status Register Write Disable (SRWD) bit is set to 1, and Write
Protect (W) is driven Low, the non-volatile bits of the Status Register (SRWD, BP2, BP1,
BP0) become read-only bits. In such a state, as the Write Status Register (WRSR)
instruction is no longer accepted for execution, the definition of the size of the Write
Protected area
cannot
be further modified.
Table 7.
Status Register format
(1)
(2)
(3)
1.
WEL (Write Enable Latch) and WIP ((Write In Program) are volatile read-only bits (WEL is set and reset by
specific instructions; WIP is automatically set and reset by the internal logic of the device).
2.
SRWD = Status Register Write Protect bit; BP0, BP1, BP2 = Block Protect Bits.
3.
The BP bits and the SRWD bit exist only in the T9HX process.
b7
b0
SRWD
0
0
BP2
BP1
BP0
WEL
WIP
相關(guān)PDF資料
PDF描述
M25PE40VMN6G 4 Mbit Uniform Sector, Serial Flash Memory
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M25PE40S-VMW6G 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Trays 制造商:Micron Technology Inc 功能描述:IC FLASH 4MBIT 75MHZ 8SO
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M25PE40-VMC6G 功能描述:IC SRL FLSH 4MB 75MHZ 8MLP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:Forté™ 標(biāo)準(zhǔn)包裝:2,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 異步 存儲(chǔ)容量:256K (32K x 8) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:28-TSSOP（0.465"，11.8mm 寬） 供應(yīng)商設(shè)備封裝:28-TSOP 包裝:帶卷 (TR) 其它名稱:71V256SA15PZGI8
M25PE40-VMC6TG 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Tape and Reel
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