參數(shù)資料
型號： M25PE40
廠商： 意法半導體
元件分類： DRAM
英文描述： 4 Mbit Uniform Sector, Serial Flash Memory
中文描述： 4兆位統(tǒng)一部門，串行閃存
文件頁數(shù)： 37/60頁
文件大?。?/td> 315K
代理商： M25PE40
M25PE40
Instructions
37/60
6.13
SubSector Erase (SSE)
Note:
The SubSector Erase (SSE) instruction is decoded only in the in the T9HX process (see
Important note on page 6
).
The SubSector Erase (SSE) instruction sets to 1 (FFh) all bits inside the chosen subsector.
Before it can be accepted, a Write Enable (WREN) instruction must previously have been
executed. After the Write Enable (WREN) instruction has been decoded, the device sets the
Write Enable Latch (WEL).
The SubSector Erase (SE) instruction is entered by driving Chip Select (S) Low, followed by
the instruction code, and three address bytes on Serial Data Input (D). Any address inside
the SubSector (see
Table 4
) is a valid address for the SubSector Erase (SE) instruction.
Chip Select (S) must be driven Low for the entire duration of the sequence.
The instruction sequence is shown in
Figure 20
.
Chip Select (S) must be driven High after the eighth bit of the last address byte has been
latched in, otherwise the SubSector Erase (SE) instruction is not executed. As soon as Chip
Select (S) is driven High, the self-timed SubSector Erase cycle (whose duration is t
SSE
) is
initiated. While the SubSector Erase cycle is in progress, the Status Register may be read to
check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1
during the self-timed SubSector Erase cycle, and is 0 when it is completed. At some
unspecified time before the cycle is complete, the Write Enable Latch (WEL) bit is reset.
A SubSector Erase (SSE) instruction applied to a subsector that contains a page that is
Hardware or software Protected is not executed.
Any SubSector Erase (SSE) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
If Reset (Reset) is driven Low while a SubSector Erase (SSE) cycle is in progress, the
SubSector Erase cycle is interrupted and data may not be erased correctly (see
Table 12:
Device status after a Reset Low pulse
). On Reset going Low, the device enters the Reset
mode and a time of t
RHSL
is then required before the device can be re-selected by driving
Chip Select (S) Low. For the value of t
RHSL
see
Table 22: Timings after a Reset Low pulse
in
Section 11: DC and AC parameters
.
Figure 19.
SubSector Erase (SSE)
instruction sequence
1.
Address bits A23 to A19 are Don’t Care.
24 Bit Address
C
D
AI12356
S
2
1
3
4
5
6
7
8
9
29 30 31
Instruction
0
23 22
2
0
1
MSB
相關PDF資料
PDF描述
M25PE40VMN6G 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMN6P 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMN6TG 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMN6TP 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMP6G 1A Standard Fixed Output LDO Regulators with Shutdown Switch; Package: TO220FP-5; Constitution materials list: Packing style: Tube packaging; Package quantity: 50; Minimum package quantity: 500;
相關代理商/技術參數(shù)
參數(shù)描述
M25PE40S-VMW6G 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Trays 制造商:Micron Technology Inc 功能描述:IC FLASH 4MBIT 75MHZ 8SO
M25PE40S-VMW6TG 制造商:Micron Technology Inc 功能描述: 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Tape and Reel
M25PE40S-VMW6TG TR 制造商:Micron Technology Inc 功能描述:IC FLASH 4MBIT 75MHZ 8SO
M25PE40-VMC6G 功能描述:IC SRL FLSH 4MB 75MHZ 8MLP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:Forté™ 標準包裝:2,000 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 異步 存儲容量:256K (32K x 8) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:28-TSSOP（0.465"，11.8mm 寬） 供應商設備封裝:28-TSOP 包裝:帶卷 (TR) 其它名稱:71V256SA15PZGI8
M25PE40-VMC6TG 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Tape and Reel
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