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參數(shù)資料
| 型號： | M29W800T100M1R |
| 廠商： | 意法半導體 |
| 英文描述： | Low-Power Configurable Multiple-Function Gate 6-SOT -40 to 85 |
| 中文描述： | 8兆1兆x8或512KB的x16插槽，引導塊低壓單電源閃存 |
| 文件頁數(shù)： | 13/33頁 |
| 文件大?。?/td> | 233K |
| 代理商： | M29W800T100M1R |
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DQ
Name
Logic Level
Definition
Note
7
Data
Polling
’1’
Erase Complete or erase
block in Erase Suspend
Indicates the P/E.C. status, check during
Program or Erase, and on completion
before checking bits DQ5 for Program or
Erase Success.
’0’
Erase On-going
DQ
Program Complete or data
of non erase block during
Erase Suspend
DQ
Program On-going
6
Toggle Bit
’-1-0-1-0-1-0-1-’
Erase or Program On-going
Successive reads outputcomplementary
data on DQ6 while Programming orErase
operations are on-going. DQ6 remains at
constant level when P/E.C. operations are
completed or Erase Suspend is
acknowledged.
DQ
Program Complete
’-1-1-1-1-1-1-1-’
Erase Complete or Erase
Suspend on currently
addressed block
5
Error Bit
’1’
Program or Erase Error
This bit is set to ’1’in the case of
Programming or Erase failure.
’0’
Program or Erase On-going
4
Reserved
3
Erase
Time Bit
’1’
Erase TimeoutPeriod Expired
P/E.C. Erase operation has started. Only
possible command entry isErase Suspend
(ES).
’0’
Erase TimeoutPeriod
On-going
An additional block to be erased in parallel
can be entered to the P/E.C.
2
Toggle Bit
’-1-0-1-0-1-0-1-’
Chip Erase, Erase or Erase
Suspend on the currently
addressed block.
Erase Error due to the
currently addressedblock
(when DQ5 = ’1’).
Indicates the erase status and allows to
identify the erased block
1
Program on-going,Erase
on-going on another block or
Erase Complete
DQ
Erase Suspend read on
non Erase Suspend block
1
Reserved
0
Reserved
Notes:
Logic level ’1’is High, ’0’ is Low.-0-1-0-0-0-1-1-1-0- represent bit value in successive Read operations.
Table 9. StatusRegister Bits
13/33
M29W800T M29W800B
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