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參數(shù)資料
| 型號： | M34570EDFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDSO36 |
| 封裝： | 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-36 |
| 文件頁數(shù)： | 67/69頁 |
| 文件大?。?/td> | 687K |
| 代理商： | M34570EDFP |
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Under
development
Preliminary Specifications REV.1.02
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER
System Clock
70
Figure 1.8.5. CM2 Register
CM20
CM21
CM22
CM23
Oscillation stop detect register1
CPU clock switch bit2,3
Oscillation stop detect
enable bit
XIN clock monitor flag5
Oscillation stop detect
flag4
Reserved bit
0: Main clock oscillating
1: Main clock stop
0: Main clock6
1: Ring oscillator clock
0: Main clock not stopped
1: Detect main clock stop
0: Oscillation stop detect function disabled
1: Oscillation stop detect function enabled
Should set to "0"
Symbol
Address
When reset
CM2
000D16
0000 00002
Function
Bit name
Bit
symbol
RW
RO
RW
Notes :
1. The PRC0 bit in the PRCR register is set to "1" (write enable) before rewriting the CM2 register.
2. When the main clock oscillation stop is detected while setting the CM20 bit to "1" (oscillation stop
detect function enabled), the CM21 bit is set to "1" (ring oscillator clock). Although the main clock
starts oscillating, the CM21 bit is not set to "0" (main clock). When the main clock is used as a
CPU clock source after restarting the main clock oscillation, the CM21 bit should be set to "0" by
program.
3. When setting the CM20 bit to "1" and the CM22 bit to "1" (main clock stop detected), avoid setting
the CM21 bit to "0".
4. When detecting the main clock stop, the CM22 bit is set to "1" (detect main clock stop). The CM22
bit can be set to "0" (main clock not stopped) only by program.
When setting the CM22 bit to "0" by program during a main clock oscillation stop, the CM22 bit
cannot be set to "1" before detecting the next main clock stop.
5. A main clock status should be determine by reading the CM23 bit with an oscillation stop interrupt
processing program several times.
6. When setting the CM21 bit to "0", the CPU clock is selected by the CM17 bit in the CM1 register.
b7
b6
b5
b4
b3
b2
b1
b0
0
00
0
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