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參數(shù)資料
| 型號(hào)： | M36DR432AD10ZA6T |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | PS MEDICAL SWITCHING 24V 1.7A |
| 中文描述： | 32兆位的2Mb x16插槽，雙行，頁閃存和4兆位的256Kb x16的SRAM，多個(gè)存儲(chǔ)產(chǎn)品 |
| 文件頁數(shù)： | 48/52頁 |
| 文件大小： | 834K |
| 代理商： | M36DR432AD10ZA6T |
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M36DR432AD, M36DR432BD
48/52
APPENDIX B. COMMON FLASH INTERFACE
The Common Flash Interface is a JEDEC ap-
proved, standardized data structure that can be
read from the Flash memory device. It allows a
system software to query the device to determine
various electrical and timing parameters, density
information and functions supported by the mem-
ory. The system can interface easily with the de-
vice, enabling the software to upgrade itself when
necessary.
When the Read CFI Query Command is issued
structure is read from the memory. Tables 32, 33,
34 and 35 show the address used to retrieve each
data. The Query data is always presented on the
lowest order data outputs (DQ0-DQ7), the other
outputs (DQ8-DQ15) are set to 0.
The CFI data structure contains also a security
area starting at address 81h. This area can be ac-
cessed only in read mode and it is impossible to
change after it has been written by ST. Issue a
Read command to return to Read mode.
Table 32. Query Structure Overview
Table 33. CFI Query Identification String
Offset
Sub-section Name
Description
00h
Reserved
Reserved for algorithm-specific information
10h
CFI Query Identification String
Command set ID and algorithm data offset
1Bh
System Interface Information
Device timing & voltage information
27h
Device Geometry Definition
Flash device layout
P
Primary Algorithm-specific Extended Query table
Additional information specific to the Primary
Algorithm (optional)
A
Alternate Algorithm-specific Extended Query table
Additional information specific to the Alternate
Algorithm (optional)
Offset
Data
Description
00h
0020h
Manufacturer Code
01h
00A1h - bottom
00A0h - top
Device Code
02h-0Fh
reserved
Reserved
10h
0051h
Query Unique ASCII String "QRY"
11h
0052h
Query Unique ASCII String "QRY"
12h
0059h
Query Unique ASCII String "QRY"
13h
0002h
Primary Algorithm Command Set and Control Interface ID code 16 bit ID code
defining a specific algorithm
14h
0000h
15h
offset = P = 0040h
Address for Primary Algorithm extended Query table
16h
0000h
17h
0000h
Alternate Vendor Command Set and Control Interface ID Code second vendor
- specified algorithm supported (note: 0000h means none exists)
18h
0000h
19h
value = A = 0000h
Address for Alternate Algorithm extended Query table
note: 0000h means none exists
1Ah
0000h
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| M36DR432A120ZA6C | 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product |
| M36DR432B100ZA6C | 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product |
| M36DR432A100ZA6C | 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product |
| M36DR432DA85ZA6T | 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product |
| M36DR432DA10ZA6T | 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M36DR432AD12ZA6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product |
| M36DR432AD85ZA6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product |
| M36DR432ADZA | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product |
| M36DR432AZA | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product |
| M36DR432B | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product |
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