參數資料
型號: M36DR432AD10ZA6T
廠商: 意法半導體
英文描述: PS MEDICAL SWITCHING 24V 1.7A
中文描述: 32兆位的2Mb x16插槽,雙行,頁閃存和4兆位的256Kb x16的SRAM,多個存儲產品
文件頁數: 49/52頁
文件大?。?/td> 834K
代理商: M36DR432AD10ZA6T
49/52
M36DR432AD, M36DR432BD
Table 34. CFI Query System Interface Information
Offset
Data
Description
1Bh
0017h
V
DDF
Logic Supply Minimum Program/Erase or Write voltage
bit 7 to 4
BCD value in volts
bit 3 to 0
BCD value in 100 millivolts
1Ch
0022h
V
DDF
Logic Supply Maximum Program/Erase or Write voltage
bit 7 to 4
BCD value in volts
bit 3 to 0
BCD value in 100 millivolts
1Dh
0000h
V
PPF
[Programming] Supply Minimum Program/Erase voltage
bit 7 to 4
HEX value in volts
bit 3 to 0
BCD value in 100 millivolts
Note: This value must be 0000h if no V
PPF
pin is present
1Eh
00C0h
V
PPF
[Programming] Supply Maximum Program/Erase voltage
bit 7 to 4
HEX value in volts
bit 3 to 0
BCD value in 100 millivolts
Note: This value must be 0000h if no V
PPF
pin is present
1Fh
0004h
Typical timeout per single byte/word program (multi-byte program count = 1), 2
n
μs
(if supported; 0000h = not supported)
20h
0003h
Typical timeout for maximum-size multi-byte program or page write, 2
n
μs
(if supported; 0000h = not supported)
21h
000Ah
Typical timeout per individual block erase, 2
n
ms
(if supported; 0000h = not supported)
22h
0000h
Typical timeout for full chip erase, 2
n
ms
(if supported; 0000h = not supported)
23h
0003h
Maximum timeout for byte/word program, 2
n
times typical (offset 1Fh)
(0000h = not supported)
24h
0004h
Maximum timeout for multi-byte program or page write, 2
n
times typical (offset 20h)
(0000h = not supported)
25h
0002h
Maximum timeout per individual block erase, 2
n
times typical (offset 21h)
(0000h = not supported)
26h
0000h
Maximum timeout for chip erase, 2
n
times typical (offset 22h)
(0000h = not supported)
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