參數(shù)資料
型號(hào): M36DR432AZA
廠商: 意法半導(dǎo)體
英文描述: 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
中文描述: 32兆位的2Mb x16插槽,雙行,頁(yè)閃存和4兆位256K x16的SRAM,多個(gè)存儲(chǔ)產(chǎn)品
文件頁(yè)數(shù): 32/52頁(yè)
文件大?。?/td> 834K
代理商: M36DR432AZA
M36DR432AD, M36DR432BD
32/52
Figure 10. Flash Write AC Waveforms, Write Enable Controlled
Note: Addresses are latched on the falling edge of WF, Data is latched on the rising edge of WF.
Table 19. Flash Write AC Characteristics, Write Enable Controlled
Note: 1. To be characterized.
Symbol
Alt
Parameter
M36DR432AD, M36DR432BD
Unit
85
100
120
Min
Max
Min
Max
Min
Max
t
AVAV
t
WC
Address Valid to Next Address Valid
85
(1)
100
120
ns
t
ELWL
t
CS
Chip Enable Low to Write Enable Low
0
0
0
ns
t
WLWH
t
WP
Write Enable Low to Write Enable High
50
(1)
50
50
ns
t
DVWH
t
DS
Input Valid to Write Enable High
40
(1)
50
50
ns
t
WHDX
t
DH
Write Enable High to Input Transition
0
0
0
ns
t
WHEH
t
CH
Write Enable High to Chip Enable High
0
0
0
ns
t
WHWL
t
WPH
Write Enable High to Write Enable Low
30
30
30
ns
t
AVWL
t
AS
Address Valid to Write Enable Low
0
0
0
ns
t
WLAX
t
AH
Write Enable Low to Address Transition
50
50
50
ns
t
GHWL
Output Enable High to Write Enable Low
0
0
0
ns
t
VDHEL
t
VCS
V
DD
High to Chip Enable Low
50
50
50
μs
t
WHGL
t
OEH
Write Enable High to Output Enable Low
30
30
30
ns
t
PLQ7V
RPF Low to Reset Complete During
Program/Erase
15
15
15
μs
AI07314
EF
GF
WF
A0-A20
DQ0-DQ15
VALID
VALID
VDDF
tVDHEL
tWHEH
tWHWL
tELWL
tAVWL
tWHGL
tWLAX
tWHDX
tAVAV
tDVWH
tWLWH
tGHWL
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