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參數(shù)資料
| 型號： | M39432 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Single Chip 4Mbit Flash and 256Kbit Parallel EEPROM Memory(單片4Mb閃速和256Kb并行EEPROM) |
| 中文描述： | 單芯片的4Mb并行閃存和256Kbit EEPROM存儲器（單片4Mb的閃速和256Kb的并行的EEPROM） |
| 文件頁數(shù)： | 4/30頁 |
| 文件大?。?/td> | 247K |
| 代理商： | M39432 |
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Operation
EF
EE
G
W
DQ0 - DQ7
Read
V
IL
V
IH
V
IL
V
IH
Read in Flash Block
V
IH
V
IL
V
IL
V
IH
Read in EEPROM Block
Write
V
IL
V
IH
V
IH
V
IL
Write in Flash Block
V
IH
V
IL
V
IH
V
IL
Write in EEPROM Block
Output Disable
V
IL
V
IH
V
IH
X
Hi-Z
V
IH
V
IL
V
IH
X
Hi-Z
Standby
V
IH
V
IH
X
X
Hi-Z
Note:
X = V
IL
or V
IH
.
Table 3. Basic Operations
OPERATIONS
The M39432 memory is addressed through 19
inputs A0-A18 and provides data on eight Data
Inputs/Outputs DQ0-DQ7 with the help of four con-
trol lines: Chip Enable EEPROM (EE), Chip Enable
Flash (EF), Output Enable (E) and Write Enable
(W) inputs.
An operation is defined as the basic decoding of
the logic level applied to the control input pins (EF,
EE, G, W) and the specified voltages applied on
the relevant address pins. These operations are
detailed in Table 3.
Read.
Both Chip Enable and Output Enable (that
is EF and G or EE and G) must be low in order to
read the output of the memory.
Read operations are used to output the contents
from the Flash or EEPROM block, the Manufac-
turer identifier, the Flash Sector protection Status,
the Flash block Identifier, the EEPROM identifier or
the OTP row content.
Notes:
– The Chip Enable input mainly provides power
control and should be used for device selection.
The Output Enable input should be used to gate
data onto the output in combination with active
EF or EE input signals.
– The data read depends on the previous instruc-
tion entered into the memory (see Table 4).
Write.
A Write operation can be used for two goals:
– either write data in the EEPROM memory block
– or enter a sequence of bytes composing an
instruction.
The reader should note that Programming a Flash
byte is an instruction (see Instructions paragraph).
Writing data requires:
– the Chip Enable (either EE or EF) to be Low
– the Write Enable (W) to be Low with Output
Enable (G) High.
Addresses in Flash block (or EEPROM block) are
latched on the falling edge of W or EF (EE) which-
ever occurs last; the data to be written in Flash
block (EEPROM block) is latched on the rising edge
of W or EF (EE) whichever occurs first.
Specific Read and Write Operations.
Device
specific data is accessed through operations de-
coding the V
ID
level applied on A9 (V
ID
= 12V +
0.5V) and the logic levels applied on address inputs
(A0, A1, A6). These specific operations are:
– Read the Manufacturer identifier
– Read the Device identifier
– Define the Flash Sector protection
– Read the EEPROM identifier
– Write the EEPROM identifier
Note: The OTP row (64 bytes) is accessed with a
specific software sequence detailed in the para-
graph "Write in OTP row".
Instructions
An instruction is defined as a sequence of specific
Write operations. Each received byte is sequen-
tially decoded (and not executed as standard Write
operations) and the instruction is executed when
the correct number of bytes are properly received
and the time between two consecutive bytes is
shorter than the time-out value.
The sequencing of any instruction must be followed
exactly, any invalid combination of instruction bytes
or time-out between two consecutive bytes will
reset the device logic into a Read memory state
(when addressing the Flash block) or directly de-
coded as a single operation when addressing the
EEPROM block.
4/30
M39432
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| M39432-10VNC6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 4 Mbit Flash Memory and 256 Kbit Parallel EEPROM |
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| M39432-12VNC6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 4 Mbit Flash Memory and 256 Kbit Parallel EEPROM |
| M39432-12WNC6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Single Chip 4 Mbit Flash Memory and 256 Kbit Parallel EEPROM |
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