23
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
The next code examples show assembly and C functions for reading the EEPROM. The examples assume that interrupts are
controlled so that no interrupts will occur during execution of these functions.
4.3.5
Preventing EEPROM Corruption
during periods of low VCC, the EEPROM data can be corrupted because the supply voltage is too low for the CPU and the
EEPROM to operate properly. These issues are the same as for board level systems using EEPROM, and the same design
solutions should be applied.
An EEPROM data corruption can be caused by two situations when the voltage is too low. First, a regular write sequence to the
EEPROM requires a minimum voltage to operate correctly. Secondly, the CPU itself can execute instructions incorrectly, if the
supply voltage is too low.
EEPROM data corruption can easily be avoided by following this design recommendation:
Keep the AVR RESET active (low) during periods of insufficient power supply voltage. This can be done by enabling the
internal Brown-out Detector (BOD). If the detection level of the internal BOD does not match the needed detection level, an
external low VCC reset Protection circuit can be used. If a reset occurs while a write operation is in progress, the write operation
will be completed provided that the power supply voltage is sufficient.
4.4
I/O Memory
All Atmel ATmega16/32/64/M1/C1 I/Os and peripherals are placed in the I/O space. All I/O locations may be accessed by the
LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32 general purpose working registers and the I/O
space. I/O registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
registers, the value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the instruction set section
for more details. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When
addressing I/O registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel
ATmega16/32/64/M1/C1 is a complex microcontroller with more peripheral units than can be supported within the 64 location
reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the
ST/STS/STD and LD/LDS/LDD instructions can be used.
Assembly Code Example
EEPROM_read:
; Wait for completion of previous write
sbic
EECR,EEWE
rjmp
EEPROM_read
; Set up address (r18:r17) in address register
out
EEARH, r18
out
EEARL, r17
; Start eeprom read by writing EERE
sbi
EECR,EERE
; Read data from data register
in
r16,EEDR
ret
C Code Example
unsigned char
EEPROM_read(unsigned int uiAddress)
{
/* Wait for completion of previous write */
while(EECR & (1<<EEWE))
;
/* Set up address register */
EEAR = uiAddress;
/* Start eeprom read by writing EERE */
EECR |= (1<<EERE);
/* Return data from data register */
return EEDR;
}