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參數(shù)資料
| 型號(hào)： | M44C090-XXX-FL16 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDSO16 |
| 文件頁數(shù)： | 165/319頁 |
| 文件大?。?/td> | 11009K |
| 代理商： | M44C090-XXX-FL16 |
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247
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
Alternative 2, fill the buffer after page erase
●
Perform a page erase
●
Fill temporary page buffer
●
Perform a page write
If only a part of the page needs to be changed, the rest of the page must be stored (for example in the temporary page buffer)
before the erase, and then be rewritten. When using alternative 1, the boot loader provides an effective read-modify-write
feature which allows the user software to first read the page, do the necessary changes, and then write back the modified data.
If alternative 2 is used, it is not possible to read the old data while loading since the page is already erased. The temporary page
buffer can be accessed in a random sequence. It is essential that the page address used in both the page erase and page write
operation is addressing the same page. See Section 24.7.13 “Simple Assembly Code Example for a Boot Loader” on page 250
for an assembly code example.
24.7.1 Performing Page Erase by SPM
To execute page erase, set up the address in the Z-pointer, write “X0000011” to SPMCSR and execute SPM within four clock
cycles after writing SPMCSR. The data in R1 and R0 is ignored. The page address must be written to PCPAGE in the
Z-register. Other bits in the Z-pointer will be ignored during this operation.
●
Page erase to the RWW section: The NRWW section can be read during the page erase.
●
Page erase to the NRWW section: The CPU is halted during the operation.
24.7.2 Filling the Temporary Buffer (Page Loading)
To write an instruction word, set up the address in the Z-pointer and data in R1:R0, write “00000001” to SPMCSR and execute
SPM within four clock cycles after writing SPMCSR. The content of PCWORD in the Z-register is used to address the data in the
temporary buffer. The temporary buffer will auto-erase after a page write operation or by writing the RWWSRE bit in SPMCSR.
It is also erased after a system reset. Note that it is not possible to write more than one time to each address without erasing the
temporary buffer.
If the EEPROM is written in the middle of an SPM page load operation, all data loaded will be lost.
24.7.3 Performing a Page Write
To execute page write, set up the address in the Z-pointer, write “X0000101” to SPMCSR and execute SPM within four clock
cycles after writing SPMCSR. The data in R1 and R0 is ignored. The page address must be written to PCPAGE. Other bits in
the Z-pointer must be written to zero during this operation.
●
Page write to the RWW section: The NRWW section can be read during the page write.
●
Page write to the NRWW section: The CPU is halted during the operation.
24.7.4 Using the SPM Interrupt
If the SPM interrupt is enabled, the SPM interrupt will generate a constant interrupt when the SPMEN bit in SPMCSR is cleared.
This means that the interrupt can be used instead of polling the SPMCSR register in software. When using the SPM interrupt,
the interrupt vectors should be moved to the BLS section to avoid that an interrupt is accessing the RWW section when it is
blocked for reading.
24.7.5 Consideration While Updating BLS
Special care must be taken if the user allows the boot loader section to be updated by leaving boot lock bit11 unprogrammed.
An accidental write to the boot loader itself can corrupt the entire boot loader, and further software updates might be impossible.
If it is not necessary to change the boot loader software itself, it is recommended to program the boot lock bit11 to protect the
boot loader software from any internal software changes.
24.7.6 Prevent Reading the RWW Section during Self-programming
During self-programming (either page erase or page write), the RWW section is always blocked for reading. The user software
itself must prevent that this section is addressed during the self programming operation. The RWWSB in the SPMCSR will be
set as long as the RWW section is busy. During self-programming the Interrupt vector table should be moved to the BLS or the
interrupts must be disabled. Before addressing the RWW section after the programming is completed, the user software must
clear the RWWSB by writing the RWWSRE. See Section 24.7.13 “Simple Assembly Code Example for a Boot Loader” on page
250 for an example.
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