298
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
CLT
Clear T in SREG
T
← 0
T
1
SEH
Set half carry flag in SREG
H
← 1
H
1
CLH
Clear half carry flag in SREG
H
← 0
H
1
DATA TRANSFER INSTRUCTIONS
MOV
Rd, Rr
Move between registers
Rd
← Rr
None
1
MOVW
Rd, Rr
Copy register word
Rd+1:Rd
← Rr+1:Rr
None
1
LDI
Rd, K
Load immediate
Rd
← K
None
1
LD
Rd, X
Load indirect
Rd
← (X)
None
2
LD
Rd, X+
Load indirect and post-inc.
Rd
← (X), X ← X + 1
None
2
LD
Rd, - X
Load indirect and pre-dec.
X
← X - 1, Rd ← (X)
None
2
LD
Rd, Y
Load indirect
Rd
← (Y)
None
2
LD
Rd, Y+
Load indirect and post-inc.
Rd
← (Y), Y ← Y + 1
None
2
LD
Rd, - Y
Load indirect and pre-dec.
Y
← Y - 1, Rd ← (Y)
None
2
LDD
Rd,Y+q
Load indirect with displacement
Rd
← (Y + q)
None
2
LD
Rd, Z
Load indirect
Rd
← (Z)
None
2
LD
Rd, Z+
Load indirect and post-inc.
Rd
← (Z), Z ← Z+1
None
2
LD
Rd, -Z
Load indirect and pre-dec.
Z
← Z - 1, Rd ← (Z)
None
2
LDD
Rd, Z+q
Load indirect with displacement
Rd
← (Z + q)
None
2
LDS
Rd, k
Load direct from SRAM
Rd
← (k)
None
2
ST
X, Rr
Store indirect
(X)
← Rr
None
2
ST
X+, Rr
Store indirect and post-inc.
(X)
← Rr, X ← X + 1
None
2
ST
- X, Rr
Store indirect and pre-dec.
X
← X - 1, (X) ← Rr
None
2
ST
Y, Rr
Store indirect
(Y)
← Rr
None
2
ST
Y+, Rr
Store indirect and post-inc.
(Y)
← Rr, Y ← Y + 1
None
2
ST
- Y, Rr
Store indirect and pre-dec.
Y
← Y - 1, (Y) ← Rr
None
2
STD
Y+q,Rr
Store indirect with displacement
(Y + q)
← Rr
None
2
ST
Z, Rr
Store indirect
(Z)
← Rr
None
2
ST
Z+, Rr
Store indirect and post-inc.
(Z)
← Rr, Z ← Z + 1
None
2
ST
-Z, Rr
Store indirect and pre-dec.
Z
← Z - 1, (Z) ← Rr
None
2
STD
Z+q,Rr
Store indirect with displacement
(Z + q)
← Rr
None
2
STS
k, Rr
Store direct to SRAM
(k)
← Rr
None
2
LPM
Load program memory
R0
← (Z)
None
3
LPM
Rd, Z
Load program memory
Rd
← (Z)
None
3
LPM
Rd, Z+
Load program memory and post-inc
Rd
← (Z), Z ← Z+1
None
3
SPM
Store program memory
(Z)
← R1:R0
None
-
IN
Rd, P
In port
Rd
← P
None
1
OUT
P, Rr
Out port
P
← Rr
None
1
PUSH
Rr
Push register on stack
STACK
← Rr
None
2
POP
Rd
Pop register from stack
Rd
← STACK
None
2
MCU CONTROL INSTRUCTIONS
NOP
No operation
None
1
SLEEP
Sleep
(see specific descr. for sleep function)
None
1
WDR
Watchdog reset
(see specific descr. for WDR/timer)
None
1
BREAK
Break
For On-chip Debug Only
None
N/A
28.
Instruction Set Summary (Continued)
Mnemonics
Operands
Description
Operation
Flags
#Clocks
Note:
1.
These Instructions are only available in “16K and 32K parts”