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參數(shù)資料
| 型號： | M68HC705UGANG |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit |
| 中文描述： | 高密度互補(bǔ)金屬氧化物半導(dǎo)體（HCMOS）微控制器 |
| 文件頁數(shù)： | 33/112頁 |
| 文件大?。?/td> | 809K |
| 代理商： | M68HC705UGANG |
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MC68HC05BD3
4-1
RESETS AND INTERRUPTS
4
4
RESETS AND INTERRUPTS
4.1
RESETS
The MC68HC05BD3 can be reset in four ways: by the initial power-on reset function, by an active
low input to the RESET pin, by an opcode fetch from an illegal address, and by a COP watchdog
timer reset. Any of these resets will cause the program to go to its starting address, specified by
the contents of memory locations $3FFE and $3FFF, and cause the interrupt mask of the
Condition Code register to be set.
4.1.1
Power-On Reset (POR)
The power-on reset occurs when a positive transition is detected on the supply voltage, V
DD
. The
power-on reset is used strictly for power-up conditions, and should not be used to detect any drops
in the power supply voltage. There is no provision for a power-down reset. The power-on circuitry
provides for a 4064 tcyc delay from the time that the oscillator becomes active. If the external
RESET pin is low at the end of the 4064 tcyc time out, the processor remains in the reset condition
until RESET goes high. The user must ensure that V
DD
has risen to a point where the MCU can
operate properly prior to the time the 4064 POR cycles have elapsed. If there is doubt, the external
RESET pin should remain low until such time that V
DD
has risen to the minimum operating voltage
specified.
4.1.2
RESET Pin
The RESET input pin is used to reset the MCU to provide an orderly software start-up procedure.
When using the external reset, the RESET pin must stay low for a minimum of 1.5tcyc. The
RESET pin contains an internal Schmitt Trigger as part of its input to improve noise immunity.
TPG
31
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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