參數(shù)資料
型號: M68HC705UGANG
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
中文描述: 高密度互補金屬氧化物半導(dǎo)體(HCMOS)微控制器
文件頁數(shù): 75/112頁
文件大?。?/td> 809K
代理商: M68HC705UGANG
MC68HC05BD3
9-3
CPU CORE AND INSTRUCTION SET
9
Interrupt (I)
When this bit is set, all maskable interrupts are masked. If an interrupt occurs while this bit is set,
the interrupt is latched and remains pending until the interrupt bit is cleared.
Negative (N)
When set, this bit indicates that the result of the last arithmetic, logical, or data manipulation was
negative.
Zero (Z)
When set, this bit indicates that the result of the last arithmetic, logical, or data manipulation was
zero.
Carry/borrow (C)
When set, this bit indicates that a carry or borrow out of the arithmetic logical unit (ALU) occurred
during the last arithmetic operation. This bit is also affected during bit test and branch instructions
and during shifts and rotates.
9.2
Instruction set
The MCU has a set of 62 basic instructions. They can be grouped into five different types as
follows:
Register/memory
Read/modify/write
Branch
Bit manipulation
Control
The following paragraphs briefly explain each type. All the instructions within a given type are
presented in individual tables.
This MCU uses all the instructions available in the M146805 CMOS family plus one more: the
unsigned multiply (MUL) instruction. This instruction allows unsigned multiplication of the contents
of the accumulator (A) and the index register (X). The high-order product is then stored in the
index register and the low-order product is stored in the accumulator. A detailed definition of the
MUL instruction is shown in Table 9-1.
TPG
73
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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