- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359091 > M68HC705UGANG (飛思卡爾半導(dǎo)體(中國)有限公司) High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit PDF資料下載
參數(shù)資料
| 型號： | M68HC705UGANG |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit |
| 中文描述： | 高密度互補金屬氧化物半導(dǎo)體（HCMOS）微控制器 |
| 文件頁數(shù)： | 74/112頁 |
| 文件大?。?/td> | 809K |
| 代理商： | M68HC705UGANG |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁當前第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁
9-2
MC68HC05BD3
CPU CORE AND INSTRUCTION SET
9
9.1.2
Index register (X)
The index register is an 8-bit register, which can contain the indexed addressing value used to
create an effective address. The index register may also be used as a temporary storage area.
9.1.3
Program counter (PC)
The program counter is a 16-bit register, which contains the address of the next byte to be fetched.
9.1.4
Stack pointer (SP)
The stack pointer is a 16-bit register, which contains the address of the next free location on the
stack. During an MCU reset or the reset stack pointer (RSP) instruction, the stack pointer is set to
location $00FF. The stack pointer is then decremented as data is pushed onto the stack and
incremented as data is pulled from the stack.
When accessing memory, the ten most significant bits are permanently set to 0000000011. These
ten bits are appended to the six least significant register bits to produce an address within the
range of $00C0 to $00FF. Subroutines and interrupts may use up to 64 (decimal) locations. If 64
locations are exceeded, the stack pointer wraps around and overwrites the previously stored
information. A subroutine call occupies two locations on the stack; an interrupt uses five locations.
9.1.5
Condition code register (CCR)
The CCR is a 5-bit register in which four bits are used to indicate the results of the instruction just
executed, and the fifth bit indicates whether interrupts are masked. These bits can be individually
tested by a program, and specific actions can be taken as a result of their state. Each bit is
explained in the following paragraphs.
Half carry (H)
This bit is set during ADD and ADC operations to indicate that a carry occurred between bits 3 and 4.
Figure 9-2
Stacking order
Condition code register
Accumulator
Index register
Program counter high
Program counter low
7
0
Stack
Unstack
Decreasing
memory
address
Increasing
memory
address
I
R
TPG
72
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M68TC11E20B56 | HC11 Microcontrollers |
| M68Z128W-70N1T | 3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable |
| M68Z128WN | 3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable |
| M68Z128W | 3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable |
| M69AW024BL60ZB8T | 16 Mbit (1M x16) 3V Asynchronous PSRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M68HC705UPGMR | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit |
| M68HC705X16PGMR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| M68HC711CFD | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:CONFIG REGISTER PROGRAMMING FOR EEPROM-BASED MHC MICROCONTROLLERS |
| M68HC711CFG | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:CONFIG REGISTER PROGRAMMING FOR EEPROM-BASED MHC MICROCONTROLLERS |
| M68HC711CFG/D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:CONFIG REGISTER PROGRAMMING FOR EEPROM-BASED MHC MICROCONTROLLERS |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。