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M7010R
Address Latch Enable (ALE_L).
When this sig-
nal is low, the addresses on the SRAM address
bus have been validated. When more than one de-
vice is cascaded, the ALE_L of all devices must be
connected.
Local Hit In (LHI[6:0]).
These
cade the device to form a larger table size. One
signal of this bus is connected to the LHO[1] or
LHO[0] of each of the upstream devices in a block.
Connect all unused LHI pins to a logic '0.' (For
more
information,
see
page 52.)
Local Hit Out (LHO[1:0]).
LHO[1]
are the same logical signal. LHO[1] or LHO[0] is
connected to one input of the LHI bus of up to four
downstream devices (in a block that contains up to
eight devices; for more information, see DEPTH-
CASCADING, page 52.)
Block Hit In (BHI[2:0]).
Inputs from the previous
BHO[2:0] are tied to the BHI[2:0] of the current de-
vice (see DEPTH-CASCADING, page 52). In a
four-block system, the last block can contain only
seven devices because the ID code 11111 is used
for broadcast access.
Block Hit Out (BHO[2:0]).
Outputs from the cur-
rent device are connected to the BHI[2:0] of the
next device (see DEPTH-CASCADING, page 52).
Full In (FULI[6:0]).
Each signal in this bus is con-
nected to FULO[0] or FULO[1] of an upstream de-
vice to generate the FULL flag for the depth-
pins
depth-cas-
DEPTH-CASCADING,
and
LHO[0]
cascaded
DEPTH-CASCADING, page 52 to Generate Full
for a Block Section.
Full Out (FULO[1:0]).
FULO[1] and FULO[0] are
the same logical signal. One of these two signals
must be connected to the FULI of up to four down-
stream devices in a depth-cascaded table. Bit [0]
in the data array indicates if the entry is full (1) or
empty (0).This signal is asserted if all of the bits in
the data array are '1s.' Refer to Depth-Cascading
to Generate a
“
FULL
”
State for a Block, page 52.
Full Flag (FULL).
When asserted, this signal in-
dicates that the table consisting of many depth-
cascaded devices is full.
Device Identification (ID[4:0]).
The
coded device ID for a depth-cascaded system
starts at 00000 and goes up to 11110. 11111 is re-
served for a special broadcast address that se-
lects all cascaded (silicon) Search Engines in the
system. On a broadcast read-only, the device with
the LDEV Bit set to '1' responds.
Test Data In (TDI).
This is the Test Access Port
’
s
Test Data In.
Test Clock (TCK).
This is the Test Access Port
’
s
Test Clock.
Test Data Out (TDO).
This is the Test Access
Port
’
s Test Data Out.
Test Mode Select (TMS).
This is the Test Ac-
cess Port
’
s Test Mode Select.
Test Reset (TRST_L).
This is the Test Access
block.
For
more
information,
see
binary-en-