參數(shù)資料
型號: MA31750
廠商: Dynex Semiconductor Ltd.
英文描述: High Performance MIL-STD-1750 Microprocessor
中文描述: 高性能的MIL - STD - 1750微處理器
文件頁數(shù): 30/42頁
文件大?。?/td> 436K
代理商: MA31750
MA31750
30/42
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Parameter
ADDRESS valid to AS rising
ADDRESS valid after AS falling
CLKOUT low to ADDRESS valid
CLKOUT rising to AS rising
CLKOUT falling to AS falling
Data setup to RDN rising
Data hold after RDN rising
CLKOUT falling to DSN, RDN, WRN falling
CLKOUT falling to DSN, RDN, WRN rising
RDYN setup to CLKOUT falling
RDYN hold after CLKOUT falling
WRN falling to write data valid
Write data valid after WRN rising (Test Load 2)
DSN falling to data bus driven (write) (Test Load 2)
DSN rising to data bus hi-Z (write) (Test Load 2)
CLKOUT falling to REQN falling
CLKOUT falling to REQN rising
GRANTN setup to CLKOUT falling
GRANTN hold after CLKOUT falling
CLKOUT falling to control, strobes and busses hi-Z (GRANTN removed) (Test Load 2)
CLKOUT falling to control, strobes and busses hi-Z (GRANTN removed) (Test Load 2)
AS falling to control, strobes and busses hi-Z (GRANTN removed) (Test Load 2)
GRANTN falling to control, strobes and busses driven
GRANTN rising to control, strobes and busses undriven (RESETN = LOW)
CLKOUT falling to INTAKN changing
CLKOUT falling to LOCKN valid
RESETN low pulse width
RESETN low to strobes inactive (GRANTN = LOW)
RESETN high to strobes valid (GRANTN = LOW)
RESETN falling to DMAE, NPU low, SUREN high
RESETN rising to DMAE, SUREN, NPU initialized
RESETN rising to first bus cycle (configuration word read)
RESETN rising to CONFWN low
RESETN rising to first instruction fetch
Interrupt setup to CLKOUT rising (level sensitive)
Interrupt hold after CLKOUT rising (level sensitive)
Interrupt pulse width (edge-sensitive)
MPROEN/EXADEN/PEN setup to AS falling (MPROEN and EXADEN sampled on early time-out)
MPROEN/EXADEN/PEN hold after AS falling (MPROEN and EXADEN sampled on early time-out)
CLKOUT falling to CONFWN changing
CLKOUT falling to DISCON changing
DPARN setup to CLKOUT falling
DPARN hold after CLKOUT falling
TCLK falling to TGON low
CONREQN hold after Console Command Chip Selection
CLKOUT falling to SNEW rising
CLKOUT falling to SNEW falling
CLKOUT falling to SUREN/DMAE valid
CLKOUT falling to SUREN/DMAE invalid
MPROEN/EXADEN setup to CLKOUT falling (to insert early wait states)
MPROEN/EXADEN hold after CLKOUT falling (to insert early wait states)
CLKOUT falling to TGON rising (following XIO GO)
AS low pulse width
AS falling to BUSFAULTN valid
CLK rising to CLKOUT rising
CLK falling to CLKOUT falling
MION valid to AS rising
MION valid after AS falling
OIN/RDWN valid to AS rising
OIN/RDWN valid after AS falling
SYSFN/FLT7N setup to CLKOUT (at end of cycle)
CLKOUT falling to NPU changing
DTON setup to TCLK falling
DTON hold after TCLK falling
Min.
TL-25
5
-
-
-
15
0
-5
-5
25
0
5
5
5
-
15
8
15
0
2
10
4
4
10
4
4
10
10
4
-
28
6
7
T31+16
15
20
10
5
15
2
8
10
5
5
-
4
4
4
4
40
0
20
0.5T-5
-
5
5
TL-20
1
TL-20
1
10
-
10
10
Max.
-
25
40
20
15
-
-
10
10
-
-
35
40
35
40
55
40
-
-
25
50
40
25
50
30
35
-
55
30
50
13960
6
7
T31+16
-
-
-
-
-
25
45
-
-
45
3
30
30
30
30
-
-
80
0.5T+10
45
25
25
-
25
-
25
-
30
-
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CLK
CLK
CLK
CLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
This timing includes MA31751 Setup Cycles and Built In Test Cycles.
Mil-Std-883, Method 5005, Subgroups 9, 10, 11.
TL = Low CLK period (ns), TH = High CLK period (ns).
Test Conditions: Vdd = 5.0V
±
10%, Temperature = -55
o
C to 125
o
C, Vil = 0.0V, Vih = Vdd.
Output loads: All test load 1 unless otherwise specified.
Output Threshold: 50% Vdd (Load 1), Vss+1V, Vdd-1V (Load 2).
Figure 32a: Timing Parameters for MA31750
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