
115
BROA0 (BR-layer Origin Address 0)
Register address
DisplayBaseAddress + 8Ch
Bit #
Bit field name
R/W
Default
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reserve
BROA0
R0
RW
R0
0
Don
’
t care
0000
This register controls the base address of the logical frame (frame0) of the
Base Right (BR) layer. Since the lowest 4 bits are fixed to 0, this address is
16-byte aligned.
BRDA0 (BR-layer Display Address 0)
Register address
DisplayBaseAddress + 90h
Bit #
Bit field name
R/W
Default
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reserve
BRDA0
R0
RW
0
Don
’
t care
This register controls the base address of the Base Right (BR) layer display
field in frame0. When the direct color mode is used, the LSB is fixed to 0 and
this address is 2-byte aligned.
BROA1 (BR-layer Origin Address 1)
Register address
DisplayBaseAddress + 94h
Bit #
Bit field name
R/W
Default
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reserve
BROA1
R0
RW
R0
0
Don
’
t care
0000
This register controls the base address of the logical frame (frame1) of the
Base Right (BR) layer. Since the lowest 4 bits are fixed to 0, this address is
16-byte aligned.
BRDA1 (BR-layer Display Address 1)
Register address
DisplayBaseAddress + 98h
Bit #
Bit field name
R/W
Default
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reserve
BRDA1
R0
RW
0
Don
’
t care
This register controls the base address of Base Right (BR) layer display field
in frame1. When the direct color mode is used, the LSB is fixed to 0 and this
address is 2-byte aligned.
BRDX (BR-layer Display position X)
Register address
DisplayBaseAddress + 9Ch
Bit #
Bit field name
R/W
Default
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
BRDX
R0
RW
0
Don
’
t care