參數(shù)資料
型號: MB91110PMT2
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP144
封裝: PLASTIC, LQFP-144
文件頁數(shù): 63/94頁
文件大?。?/td> 1099K
代理商: MB91110PMT2
MB91110 Series
66
(1) Clock Timing
(VCC5
= 5 V ± 10%, VCC3 = 3.3 V ± 5%, VSS = AVSS = AVRL = 0 V, TA = 0 °C to +70 °C)
*1 : This is the value when 10 MHz, which is the minimum value of the clock frequency, is input to X0 and 1/2 cycle
of the oscillation circuit and gearing of 1/8 are used.
*2 : This is the value when doubler is used with a 50 MHz CPU.
Parameter
Sym-
bol
Pin
Name
Conditions
Value
Unit
Remarks
Min
Max
Clock frequency (1)
fC
X0
X1
10.0
12.5
MHz
Self oscillation 12.5
MHz
Internal 50 MHz
operation (via PLL,
4 times)
Clock cycle time
tC
X0
X1
80
100
ns
Clock frequency (2)
fC
X0
X1
10
25
MHz
Self oscillation
(1/2 cycle input)
Clock frequency (3)
fC
X0
X1
10
25
MHz
External clock
(1/2 cycle input)
Clock cycle time
tC
X0
X1
40
100
ns
Input clock pulse width
PWH
PWL
X0
X1
10
ns
Clock is input to
X0/X1
PWH
X0
25
ns
Clock is input to
X0 only
Input clock
rising/falling time
tCR
tCF
X0
X1
8ns
(tCR
+ tCF)
Internal operation
clock frequency
fCP
0.625*1
50
MHz
CPU system
fCPB
0.625*1
25*2
Bus system
fCPP
0.625*1
25
Peripheral system
Internal operation
clock cycle time
tCP
20
1600*1
ns
CPU system
tCPB
40*2
1600*1
Bus system
tCPP
40
1600*1
Peripheral system
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