參數(shù)資料
型號(hào): MB91110PMT2
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP144
封裝: PLASTIC, LQFP-144
文件頁(yè)數(shù): 68/94頁(yè)
文件大小: 1099K
代理商: MB91110PMT2
MB91110 Series
70
The relationship between the CLK pin set using CHC/CCK1/CCK0 bit of the “Gear Control Register” (GCR) and
original oscillation input is as follows. However, original oscillation input indicates “X0 input clock” in this figure.
tCYC
CCK1/0 : "00"
SLCT1, 0 : 01
CCK1, 0 : 01
SLCT1, 0 : 1X
tCYC
PLL system (CHC bit of GCR : “0”setting)
2 cycles system (CHC bit of GCR : “1”setting)
(When using doubler)
or
Original oscillation input
(a) Gear
× 1 CLK pin
Original oscillation input
(a) Gear
× 1 CLK pin
CCK1/0: “00”
(b) Gear
× 1/2 CLK pins
CCK1/0: “01”
(c) Gear
× 1/4 CLK pins
CCK1/0: “10”
(d) Gear
× 1/8 CLK pins
CCK1/0: “11”
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