參數(shù)資料
型號(hào)： MBM29LV800T
廠商： Fujitsu Limited
英文描述： 8M (1M ×8/512K ×16) Bit Flash Memory( 單5V 電源電壓1M ×8/512K ×16位閃速存儲(chǔ)器)
中文描述： 8米（1米× 8/512K × 16）位快閃記憶體（單5V的電源電壓100萬(wàn)× 8/512K × 16位閃速存儲(chǔ)器）
文件頁(yè)數(shù)： 22/51頁(yè)
文件大?。?/td> 647K
代理商： MBM29LV800T
22
MBM29LV800T
-10/-12
/MBM29LV800B
-10/-12
DQ
6
Toggle Bit I
The MBM29LV800T/B also feature the “Toggle Bit I” as a method to indicate to the host system that the Embedded
Algorithms are in progress or completed.
During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from
the devices will result in DQ
6
toggling between one and zero. Once the Embedded Program or Erase Algorithm
cycle is completed, DQ
6
will stop toggling and valid data will be read on the next successive attempts. During
programming, the Toggle Bit I is valid after the rising edge of the fourth WE pulse in the four write pulse sequence.
For chip erase and sector erase, the Toggle Bit I is valid after the rising edge of the sixth WE pulse in the six
write pulse sequence. The Toggle Bit I is active during the sector time out.
In programming, if the sector being written to is protected, the toggle bit will toggle for about 2
μ
s and then stop
toggling without the data having changed. In erase, the devices will erase all the selected sectors except for the
ones that are protected. If all selected sectors are protected, the chip will toggle the toggle bit for about 100
μ
s
and then drop back into read mode, having changed none of the data.
Either CE or OE toggling will cause the DQ
6
to toggle. In addition, an Erase Suspend/Resume command will
cause DQ
6
to toggle.
See Figure 10 for the Toggle Bit I timing specifications and diagrams.
DQ
5
Exceeded Timing Limits
DQ
5
will indicate if the program or erase time has exceeded the specified limits (internal pulse count). Under
these conditions DQ
5
will produce a “1”. This is a failure condition which indicates that the program or erase
cycle was not successfully completed. Data Polling is the only operating function of the devices under this
condition. The CE circuit will partially power down the device under these conditions (to approximately 2 mA).
The OE and WE pins will control the output disable functions as described in Tables 2 and 3.
If this failure condition occurs during sector erase operation, it specifies that a particular sector is bad and it may
not be reused, other sectors are still functional and may be used for the program or erase operation. The device
must be reset to use other sectors. Write the Reset command sequence to the deveice, and then execute program
or erase command sequence. This allows the system to continue to use the other active sectors in the device.
If this failure condition occurs during the chip erase operation, it specifies that the entire chip is bad or combination
of sectors are bad.
If this failure condition occurs during the byte programming operation, it specifies that the entire sector containing
that byte is bad and this sector may not be reused. (Other sectors are still functional and can be reused.)
The DQ
5
failure condition may also appear if a user tries to program a non blank location without erasing. In this
case the devices lock out and never complete the Embedded Algorithm operation. Hence, the system never
reads a valid data on DQ
7
bit and DQ
6
never stops toggling. Once the devices have exceeded timing limits, the
DQ5 bit will indicate a “1.” Please note that this is not a device failure condition since the devices were incorrectly
used.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MBM29LV800TA 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT
MBM29LV800TA-12 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT
MBM29LV800TA-70 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT
MBM29LV800TA-90 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:8M (1M X 8/512K X 16) BIT
MBM29LV800TE 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:8M (1M x 8/512 K x 16) BIT
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